Chapter 10 Memory Subsystem.pdf

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10.2.4.4.7 Refresh Management
Refresh management can be divided as follows:
• Self-refresh management
• Autorefresh management (programmable refresh period)
10.2.4.4.7.1 Self-Refresh Management
Self-refresh is entered to place an attached SDRAM into an autonomous refresh mode, typically when the
device enters an idle mode and switches off the SDRAM clock.
In self-refresh, the SDRAM supplies the row address generation required to refresh and retain data in the
absence of external clocking.
Self-refresh can be entered using any of the following methods:
• Manually, under software control per CS
• Upon a reset event: Automatically on a warm reset event (if the SDRC is programmed to enter
self-refresh on warm reset)
• Upon a hardware request: Automatically on an idle request sent by the system power manager (if the
SDRC is programmed to enter self-refresh on idle request)
• Automatically after a (programmable) period of inactivity on the interconnect interface (if enabled by
setting the SDRC.SDRC_POWER_REG[5:4] CLKCTRL bit field to 0x2)
Self-refresh can be exited as follows:
• Manual software command (exit from self-refresh mode; see Section 10.2.5.3.4, DLL/CDL
Configuration)
• Automatically after receiving a read or write transaction to access memory
10.2.4.4.7.2 Autorefresh Management
When autorefresh is enabled, a programmable hardware counter within the SDRC generates a periodic
event that triggers either a single refresh or a burst of consecutive refresh commands. This is the standard
refresh mode used when the system is active, while the running applications regularly access the SDRAM.
An autorefresh command can also be applied using the SDRC.SDRC_MANUAL_p register (see
Section 10.2.5.3.4, DLL/CDL Configuration). This method can be used to generate a device-specific
initialization sequence after power up or after the memory device exits from a low-power mode
(self-refresh or deep-power-down).
The autorefresh request period is a user-controlled parameter programmed to meet the specification of the
memory devices. Each time an autorefresh request is issued, the SDRC can service the autorefresh using
any of the following commands:
• Single autorefresh command
• Burst of four autorefresh commands
• Burst of eight autorefresh commands
When a burst of four or eight is selected, the programmed period value is automatically scaled in
hardware by 4 or 8. Consequently, the value to be programmed does not depend on the selected burst
length.
10.2.4.4.8 System Power Management
Unlike the SMS, the SDRC can be configured only in smart-idle mode by setting the
SDRC.SDRC_SYSCONFIG[4:3] IDLEMODE field to 0x2. Once all asserted output interrupts are
acknowledged, the SDRC goes into idle state after it receives the request from the PRCM module.
The SDRC acknowledge is conditioned by the internal activity of the SDRC.
2238 Memory Subsystem SPRUGN4L–May 2010–Revised June 2011
Copyright © 2010–2011, Texas Instruments Incorporated