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Chapter 10 Memory Subsystem.pdf

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Public Version<br />

www.ti.com General-Purpose <strong>Memory</strong> Controller<br />

– 1 nibble padding spare, processing OFF<br />

– size1 nibbles spare, processing ON<br />

Checksum: Spare area size (nibbles) = size0 + (S - (1+size1))<br />

<strong>10</strong>.1.5.14.3.2.2.13 Mode 0x5<br />

Page processing sequence:<br />

• Repeat with buffer 0 to S-1<br />

– 512-byte data, processing ON<br />

• Repeat with buffer 0 to S-1<br />

– size0 nibbles spare, processing ON<br />

• Repeat with buffer 0 to S-1<br />

– size1 nibbles spare, processing ON<br />

Checksum: Spare area size (nibbles) = S - (size0 + size1)<br />

<strong>10</strong>.1.5.14.3.2.2.14 Mode 0xB (11)<br />

Page processing sequence:<br />

• Repeat with buffer 0 to S-1<br />

– 512-byte data, processing ON<br />

• Repeat with buffer 0 to S-1<br />

– size0 nibbles spare, processing ON<br />

• Repeat with buffer 0 to S-1<br />

– 1 nibble padding spare, processing OFF<br />

– size1 nibbles spare, processing ON<br />

Checksum: Spare area size (nibbles) = S - (size0 + 1 + size1)<br />

<strong>10</strong>.1.5.14.3.2.2.15 Mode 0x6<br />

Page processing sequence:<br />

• Repeat with buffer 0 to S-1<br />

– 512-byte data, processing ON<br />

• Repeat with buffer 0 to S-1<br />

– size0 nibbles spare, processing ON<br />

• Repeat S times (no buffer used)<br />

– size1 nibbles spare, processing OFF<br />

Checksum: Spare area size (nibbles) = S - (size0 + size1)<br />

<strong>10</strong>.1.5.14.3.2.3 Supported NAND Page Mappings and ECC Schemes<br />

The following rules apply throughout the entire mapping description:<br />

• Main data area (sectors) size is hardcoded to 512 bytes.<br />

• Spare area size is programmable.<br />

• All page sections (of main area data bytes, protected spare bytes, unprotected spare bytes, and ECC)<br />

are defined as explained in Section <strong>10</strong>.1.5.14.3.2.2.1.<br />

Each one of the following sections shows a NAND page mapping example (per-sector spare mappings,<br />

pooled spare mapping, per-sector spare mapping, with ECC separated at the end of the page).<br />

In the mapping diagrams, sections that belong to the same BCH codeword have the same color (blue or<br />

green); unprotected sections are not covered (orange) by the BCH scheme.<br />

SPRUGN4L–May 20<strong>10</strong>–Revised June 2011 <strong>Memory</strong> <strong>Subsystem</strong><br />

Copyright © 20<strong>10</strong>–2011, Texas Instruments Incorporated<br />

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