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Chapter 10 Memory Subsystem.pdf

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Public Version<br />

General-Purpose <strong>Memory</strong> Controller www.ti.com<br />

Below each mapping diagram, a write (encoding) and read (decoding: syndrome generation) sequence is<br />

given, with the number of the active buffers at each point in time (yellow). In the inactive zones (grey), no<br />

computing is taking place but the data counter is still active.<br />

A table on the left summarizes the mode, size0, size1 parameters to program for respectively write and<br />

read processing of a page, with the given mapping, where :<br />

• P is the size of spare byte section Protected by the ECC (in nibbles)<br />

• U is the size of spare byte section Unprotected by the ECC (in nibbles)<br />

• E is the size of the ECC itself (in nibbles)<br />

• S is the number of Sectors per page (2 in the current diagrams)<br />

Each time the processing of a BCH block is complete (ECC calculation for write/encoding, syndrome<br />

generation for read/decoding, indicated by red arrows), the update pointer is pulsed. Note that the<br />

processing for block 0 can be the first or the last to complete, depending on the NAND page mapping and<br />

operation (read or write). All examples show a page size of 1kByte + spares; that is, S = 2 sectors of 512<br />

bytes. The same principles can be extended to larger pages by adding more sectors.<br />

The actual BCH codeword size is used during the error location work to restrict the search range: by<br />

definition, errors can only happen in the codeword that was actually written to the NAND, and not in the<br />

mathematical codeword of n = 2 13 - 1 = 8191 bits. That codeword (higher-order bits) is all-zero and implicit<br />

during computations.<br />

The actual BCH codeword size depends on the mode, programmed sizes, and sector number (all sizes in<br />

nibbles):<br />

• Spares mapped and protected per sector (below: see M1-M2-M3-M9-M<strong>10</strong>):<br />

– all sectors: (512) + P + E<br />

• Spares pooled and protected by sector 0 (below: see M5-M6):<br />

– sector 0 codeword: (512) + P + E<br />

– other sectors: (512) + E<br />

• Unprotected spares (below: see M4-M7-M8-M11-M12):<br />

– all codewords (512) + E<br />

<strong>10</strong>.1.5.14.3.2.3.1 Per-Sector Spare Mappings<br />

In the schemes in Figure <strong>10</strong>-33, each 512-byte sector of the main area has its own dedicated section of<br />

the spare area. The spare area of each sector is composed of :<br />

• ECC, which must be located after the data it protects<br />

• Other data, which may or may not be protected by the sector ECC<br />

2158 <strong>Memory</strong> <strong>Subsystem</strong> SPRUGN4L–May 20<strong>10</strong>–Revised June 2011<br />

Copyright © 20<strong>10</strong>–2011, Texas Instruments Incorporated

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