Chapter 10 Memory Subsystem.pdf

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Public Version SDRAM Controller (SDRC) Subsystem www.ti.com (1) (2) Table 10-107. Calculating Image Size Steps RGB16 Format (16-Bit Pixel Format) YUV Format (32-Bit Pixel Format) IMAGEWIDTH IMAGEHEIGHT IMAGEWIDTH IMAGEHEIGHT 1 Calculate the required 240 pixels/32 bytes * 2 240/32 rows = 7.5, 120 pixels/32 bytes 240/32 rows = 7.5, number of pages per line bytes per pixel = 15 rounded to 8 pages per * 4 bytes per pixel rounded to 8 and per column. pages per line column format = 15 2 Using the number of 15 * 32 bytes/2 bytes 8 * 32 rows = 256 I5 * 32 bytes/4 bytes 256 pages calculated in Step per pixel = 240 per pixel format = 1, calculate the image 120 size in pixels. (1) Working on a page basis, the image size must be a multiple of the page size. (2) Depending on the page dimensions and the image size, the programmed image size (256) is larger than the actual image size (240). To use VRFB rotation, each initiator must configure its DMA engine correctly; an additional offset to the base address may be required. For details, see Chapter 7, Display Subsystem. 10.2.6.1.3 Applicative Use Case and Tips Use Case Scenario: Display a Rotated QVGA Image Figure 10-66 shows the use case for displaying a rotated QVGA image. The camera captures an image with a particular rotation and stores the pixel data in external memory. Displaying the image on the DSS requires a different orientation. 2264 Memory Subsystem SPRUGN4L–May 2010–Revised June 2011 Copyright © 2010–2011, Texas Instruments Incorporated
Initiator: Camera subsystem SDRC Subsystem SMS VRFB SDRC controller DDR32 Public Version www.ti.com SDRAM Controller (SDRC) Subsystem Figure 10-66. Display a Rotated QVGA Image Interconnect GPMC External memory (NOR/NAND flash) The following components interact while displaying the rotated image: • SDRC subsystem • Camera subsystem • Display subsystem • External DDR • VRFB The following conditions exist for this application: Initiator: Display subsystem Memory Subsystem • QVGA image size is 320 * 240 (width * height). • Pixel format is YUV4:2:2 (YUV2) in little endian. • The rotation view is 90 degrees. • The VRFB context is VRFB context 1. • The camera module writes QVGA images to external DRAM at 15 fps. • The display subsystem reads QVGA images from external DDR32 at 60 fps and displays them on the LCD screen. • Read and write initiators use burst mode: SPRUGN4L–May 2010–Revised June 2011 Memory Subsystem Copyright © 2010–2011, Texas Instruments Incorporated sdrc-023 2265
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This chapter describes the memory s
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Device GPMC External device/ memory
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Public Version www.ti.com General-P
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1 GBytes 512 MBytes 256 MBytes 128
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GPMC_FCLK GPMC_CLK gpmc_a[11:1] (co
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GPMC_FCLK GPMC_CLK gpmc_a[11:1] gpm
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GPMC_FCLK GPMC_CLK gpmc_a[11:1] gpm
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nCS nBE0/CLE nWE nADV/ALE CSONTIME=
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nCS nBE0/CLE nWE Public Version www
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Row 0 Row 1 Row 2 Row 3 Row 252 Row
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512 Bytes input Row 0 Row 1 Row 2 R
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M0 Manual mode Rd/Wr/ SW Mode Size0
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M1 M2 M3 M4 Per-sector spares Spare
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M9 Per-sector spares, separate ECC
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GPMC_FCLK nCS nBE0/CLE nOE/nRE nADV
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Device GPMC module A [27:17] A [16:
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FCLK CLK nADV nCS nOE A/D bus ClkAc
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FCLK nCS nADV nWE A/D bus AdvWrOffT
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Public Version www.ti.com SDRAM Con
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Device SDRAM controller subsystem R
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Public Version www.ti.com On-Chip M
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