Chapter 10 Memory Subsystem.pdf

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Many cases exist other than the ones previously given; for example, where the message does not start on
a word boundary.
10.1.5.14.3.2.2.2 Memory-Mapping of the ECC
The ECC (or remainder) is presented by the BCH module as a single 104-bit (or 52-bit), little-endian
vector. It is up to the software to fetch those 13 bytes (or 6 bytes) from the modules interface, and then
store them to the NAND spare area (page write) or to an intermediate buffer for comparison with the
stored ECC (page read). There are no constraints on the ECC mapping inside the spare area: it is
software-controlled.
However, it is advised to maintain a coherence in the respective formats of the message or the ECC
remainder once they have been read out of the NAND. The error correction algorithm works from the
complete codeword (concatenated message and remainder) once an error as been detected. The creation
of this codeword must be made as straightforward as possible.
There are cases where the same NAND access contains both data and the ECC protecting that data. This
is the case when the data/ECC boundary (which can be on any nibble) does not coincide with an access
boundary. The ECC is calculated on-the-fly following the write. In that case, the write must also contain
part of the ECC because it is impossible to insert the ECC on-the-fly. Instead:
• During the initial page write (BCH encoding), the ECC is replaced by dummy bits. The BCH encoder is
by definition turned OFF during the ECC section, so the BCH result is unmodified.
• During a second phase, the ECC is written to the correct location, next to the actual data.
• The completed line buffer is then written to the NAND array.
10.1.5.14.3.2.2.3 Wrapping Modes
For a given wrapping mode, the module automatically goes through a specific number of sections, as data
is being fed into the module. For each section, the BCH core can be enabled (in which case the data is
fed to the BCH divider) or not (in which case the BCH simply counts to the end of the section). When
enabled, the data is added to the ongoing calculation for a given sector number (for example, number 0).
Wrapping modes are described below. To get a better understanding and see the real-life read and write
sequences implemented with each mode, see Section 10.1.5.14.3.2.3.
For each mode:
• A sequence describes the mode in pseudo-language, with the size and the buffer used for ECC
processing (if ON) for each section. The programmable lengths are size, size0, and size1.
• A checksum condition is given. If the checksum condition is not respected for a given mode, the
module behavior is unpredictable. S is the number of sectors in the page; size0 and size1 are the
section sizes programmed for the mode, in nibbles.
Wrapping modes 8, 9, 10, and 11 insert a 1-nibble padding where the BCH processing is OFF. This is
intended for t = 4 ECC, where ECC is 6 bytes long and the ECC area is expected to include (at least) one
unused nibble to remain byte-aligned.
10.1.5.14.3.2.2.4 Manual Mode (0x0)
This mode is intended for short sequences, added manually to a given buffer through the software data
port input. A complete page may be built out of several such sequences.
To process an arbitrary sequence of 4-bit nibbles, accesses to the software data port shall be made,
containing the appropriate data. If the sequence end does not coincide with an access boundary (for
example, to process 5 nibbles = 20 bits in 16-bit access mode) and those nibbles need to be skipped, a
number of unused nibbles shall be programmed in size1 (in the same example: 5 nibbles to process + 3 to
discard = 8 nibbles = exactly 2 x 16-bit accesses: we must program size0 = 5, size1 = 3).
NOTE: In the following figures size and size0 are the same parameter.
2154 Memory Subsystem SPRUGN4L–May 2010–Revised June 2011
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