Chapter 10 Memory Subsystem.pdf

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General-Purpose Memory Controller www.ti.com
Bits Field Name Description Type Reset
2 ERRORTIMEOUT Time-out error R 0x0
0x0: No error occurs
0x1: The error is due to a time out
1 RESERVED Write 0s for future compatibility. Read returns 0. RW 0x0
0 ERRORVALID Error validity status - Must be explicitly cleared with a write RW 0x0
1 transaction
General-Purpose Memory Controller
• Error Handling: [0] [1] [2]
• GPMC Register Summary: [3]
• GPMC Register Description: [4]
Address Offset 0x0000 0050
0x0: All error fields no longer valid
0x1: Error detected and logged in the other error fields
Table 10-44. Register Call Summary for Register GPMC_ERR_TYPE
Table 10-45. GPMC_CONFIG
Physical Address 0x6E00 0050 Instance GPMC
Description The configuration register allows global configuration of the GPMC
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED
Bits Field Name Description Type Reset
31:12 RESERVED Write 0s for future compatibility. Read returns 0s. RW 0x00000
11 WAIT3PINPOLARITY Selects the polarity of input pin WAIT3 RW 0x1
0x0: WAIT3 active low
0x1: WAIT3 active high
10 WAIT2PINPOLARITY Selects the polarity of input pin WAIT2 RW 0x0
0x0: WAIT2 active low
0x1: WAIT2 active high
9 WAIT1PINPOLARITY Selects the polarity of input pin WAIT1 RW 0x1
0x0: WAIT1 active low
0x1: WAIT1 active high
8 WAIT0PINPOLARITY Selects the polarity of input pin WAIT0 RW 0x0
0x0: WAIT0 active low
0x1: WAIT0 active high
7:5 RESERVED Write 0s for future compatibility. Read returns 0s. RW 0x0
2184 Memory Subsystem SPRUGN4L–May 2010–Revised June 2011
WAIT3PINPOLARITY
WAIT2PINPOLARITY
Copyright © 2010–2011, Texas Instruments Incorporated
WAIT1PINPOLARITY
WAIT0PINPOLARITY
RESERVED
WRITEPROTECT
RESERVED
LIMITEDADDRESS
NANDFORCEPOSTEDWRITE