Chapter 10 Memory Subsystem.pdf

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Table 10-10. Misaligned Nibble Mapping of Message in 8-bit NAND
Byte Offset 8-Bit Word
4-Bit Most Significant Nibble 4-Bit Less Significant Nibble
1 (msb) Nibble S-1 Nibble S-2
2 Nibble S-3 Nibble S-4
... ... ...
(S+1)/2 - 2 Nibble 2 Nibble 1
(S+1)/2 - 1 Nibble 0 (lsb)
Table 10-11. Aligned Nibble Mapping of Message in 16-bit NAND
Byte Offset 16-Bit Word
4-Bit Most Significant Nibble 4-Bit Less Significant Nibble
0 Nibble S-3 Nibble S-4 (msb) Nibble S-1 Nibble S-2
2 Nibble S-7 Nibble S-8 Nibble S-5 Nibble S-6
... ... ...
S/2 - 4 Nibble 5 Nibble 4 Nibble 7 Nibble 6
S/2 - 2 Nibble 1 Nibble 0 (lsb) Nibble 3 Nibble 2
Table 10-12. Misaligned Nibble Mapping of Message in 16-bit NAND (1 Unused Nibble)
Byte Offset 16-Bit Word
4-Bit Most Significant Nibble 4-bit less significant Nibble
0 Nibble S-3 Nibble S-4 (msb) Nibble S-1 Nibble S-2
2 Nibble S-7 Nibble S-8 Nibble S-5 Nibble S-6
... ... ...
(S+1)/2 - 4 Nibble 4 Nibble 3 Nibble 6 Nibble 5
(S+1)/2 - 2 Nibble 0 (lsb) Nibble 2 Nibble 1
Table 10-13. Misaligned Nibble Mapping of Message in 16-bit NAND (2 Unused Nibbles)
Byte Offset 16-Bit Word
4-Bit Most Significant Nibble 4-Bit Less Significant Nibble
0 Nibble S-3 Nibble S-4 (msb) Nibble S-1 Nibble S-2
2 Nibble S-7 Nibble S-8 Nibble S-5 Nibble S-6
... ... ...
(S+2)/2 - 4 Nibble 3 Nibble 2 Nibble 5 Nibble 4
(S+2)/2 - 2 Nibble 1 Nibble 0 (lsb)
Table 10-14. Misaligned Nibble Mapping of Message in 16-bit NAND (3 Unused Nibbles)
Byte Offset 16-Bit Word
4-Bit Most Significant Nibble 4-Bit Less Significant Nibble
0 Nibble S-3 Nibble S-4 (msb) Nibble S-1 Nibble S-2
2 Nibble S-7 Nibble S-8 Nibble S-5 Nibble S-6
... ... ...
(S+3)/2 - 4 Nibble 2 Nibble 1 Nibble 4 Nibble 3
(S+3)/2 - 2 Nibble 0 (lsb)
SPRUGN4L–May 2010–Revised June 2011 Memory Subsystem
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