Chapter 10 Memory Subsystem.pdf

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www.ti.com SDRAM Controller (SDRC) Subsystem
• Interrogates the ERRORDPD field of the SDRC.SDRC_ERR_TYPE register to determine whether a
transaction error resulting from the device being in deep-power-down mode is present
• Interrogates the ERRORCONNID field of the SDRC.SDRC_ERR_TYPE register to determine whether
a transaction error resulting from an illegal access by an interconnect initiator is present
• Interrogates the ERRORADD field of the SDRC.SDRC_ERR_TYPE register to determine whether a
transaction error resulting from an illegal address is present:
– Interconnect access to an address outside the memory space (0x0)
– Interconnect access to an address outside the register space (0x1)
• Writes 0 to the ERRORVALID field of the SDRC.SDRC_ERR_TYPE register to clear the active error
status
• Executes error recovery from software
10.2.6 SDRC Use Cases and Tips
10.2.6.1 How to Program the VRFB
10.2.6.1.1 VRFB Rotation Mechanism
An inherent limitation of SDRAM technology is high-memory latency caused by page-miss penalties
incurred when downloading to a memory cache. For example, switching from one page to another in
external memory can cause a page-miss, indicating that the page accessed for the current pixel is
different from that for the previous pixel.
A DMA engine is used to rotate pictures in external DRAM, but this rotation method increases the number
of page misses.
The efficient way to rotate image data in external SDRAM is to use the VRFB module, which is an RE
embedded in the SMS of the device, as shown in Figure 10-62. It is configured in the SMS registers.
SPRUGN4L–May 2010–Revised June 2011 Memory Subsystem
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