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Chapter 10 Memory Subsystem.pdf

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Public Version<br />

www.ti.com SDRAM Controller (SDRC) <strong>Subsystem</strong><br />

appropriate.<br />

– When performing burst accesses with 90° or 270° rotation views, the burst is split on the memory<br />

side, adding latency.<br />

For a burst access with 90° rotation, split the data of the burst on the write side (not the read side):<br />

• Write in 270°° and read in 0°.<br />

<strong>10</strong>.2.6.2 SMS Mode of Operation<br />

<strong>10</strong>.2.6.2.1 SDRAM <strong>Memory</strong> Scheduler and Arbitration Policy<br />

The SDRAM memory scheduler improves access to external memory by:<br />

• Optimizing SDRAM bandwidth<br />

• Prioritizing requests to external memory<br />

This mechanism relies on a complex arbitration policy that employs specific terminology:<br />

• Group: a FIFO queue of requests from initiators<br />

• Class: A collection of groups<br />

• Transaction: A full burst request<br />

• Arbitration grant: Authorization of a service requested by an initiator<br />

The arbitration policy operates on two interdependent mechanisms:<br />

• The arbitration decision, which establishes priority for processing requests. The question: Which<br />

request is processed next? occurs on a transaction boundary.<br />

• Arbitration granularity, which determines the length of an arbitration grant. The question: How long to<br />

keep the grant? defines the boundary of the arbitration decision point in time.<br />

Figure <strong>10</strong>-67 shows the link between these two concepts. On a transaction boundary, the questions: What<br />

request is serviced next, and for how long? merge the two mechanisms. The mechanisms for specifying<br />

the granularity of requests also influence the boundary of a transaction.<br />

SPRUGN4L–May 20<strong>10</strong>–Revised June 2011 <strong>Memory</strong> <strong>Subsystem</strong><br />

Copyright © 20<strong>10</strong>–2011, Texas Instruments Incorporated<br />

2267

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