Chapter 10 Memory Subsystem.pdf
Chapter 10 Memory Subsystem.pdf
Chapter 10 Memory Subsystem.pdf
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Status:<br />
There are n pending<br />
requests stored in<br />
the 8 FIFO queues.<br />
Cx Win<br />
How many simultaneous<br />
eligible requests are there?<br />
X = [0:2]<br />
0 for class 0<br />
1 for class 1<br />
2 for class 2<br />
0 request A<br />
1 request B<br />
Yes<br />
2 reqs HIGHPRIOVECTOR?<br />
No<br />
Yes<br />
3 reqs HIGHPRIOVECTOR?<br />
No<br />
4 reqs HIGHPRIOVECTOR?<br />
Public Version<br />
www.ti.com SDRAM Controller (SDRC) <strong>Subsystem</strong><br />
Figure <strong>10</strong>-74. Generic Arbitration Decision<br />
At this time, it is ensure that for each group containing a req:<br />
The request is part of the burst, the BURSTCOMPLETE<br />
ttribute is set, and the full burst is not available<br />
Yes<br />
No<br />
LRU policy<br />
LRU policy<br />
LRU policy<br />
B<br />
B<br />
B<br />
B<br />
B<br />
B<br />
Go back to the<br />
arbitration decision<br />
Move to the arbitration<br />
granularity process<br />
Is there a priority between<br />
the 2 groups containing the 2<br />
requests?<br />
The least-recently-used thread<br />
which made the request is<br />
serviced.<br />
Class 0 - class 1<br />
(a simultaneous decision can<br />
occur between 2 groups, 1 group,<br />
or none).<br />
Class 2<br />
(a simultaneous decision<br />
can occur between 4 reqs<br />
stored in the 4 groups, 3 reqs<br />
stored in 3 groups, etc.).<br />
SPRUGN4L–May 20<strong>10</strong>–Revised June 2011 <strong>Memory</strong> <strong>Subsystem</strong><br />
Copyright © 20<strong>10</strong>–2011, Texas Instruments Incorporated<br />
sdrc-031<br />
2275