Geode GXLV Processor Series Low Power Integrated x86 Solutions

Integrated Functions (Continued)4.3.2 Memory OrganizationsThe memory controller supports JEDEC standard synchronousDRAMs in 16 Mbit and 64 Mbit configurations.Supported configurations are shown in Table 4-11. NoteDepthOrganizationTable 4-11. Synchronous DRAM ConfigurationsRowAddressthat when using x4 SDRAM, there are 16 devices perbank. The GXLV supports a total of 32 devices. There areonly two banks total when x4 devices are used.ColumnAddressBankAddressTotal # ofAddress bits1 1 Mx16 A10-A0 A7-A0 BA0 202 2 Mx8 A10-A0 A8-A0 BA0 212 Mx32 A10-A0 A7-A0 BA1-BA0 212 Mx32 A10-A0 A8-A0 BA0 212 Mx32 A11-A0 A6-A0 BA1-BA0 212 Mx32 A12-A0 A6-A0 BA0 214 4 Mx4 A10-A0 A9-A0 BA0 224 Mx16 A11-A0 A7-A0 BA1-BA0 224 Mx16 A12-A0 A7-A0 BA0 224 Mx16 A10-A0 A9-A0 BA0 228 8 Mx8 A11-A0 A8-A0 BA1-BA0 238 Mx8 A12-A0 A8-A0 BA0 238 Mx32 A11-A0 A8-A0 BA1-BA0 238 Mx32 A12-A0 A7-A0 BA1-BA0 2316 16 Mx4 A11-A0 A9-A0 BA1-BA0 2416 Mx4 A12-A0 A9-A0 BA0 2416 Mx16 A12-A0 A8-A0 BA1-BA0 2416 Mx16 A11-A0 A9-A0 BA1-BA0 2432 32 Mx8 A12-A0 A9-A0 BA1-BA0 2564 64 Mx4 A12-A0 A9-A0,A11 BA1-BA0 26Geode GXLV Processor SeriesRevision 1.3 109 www.national.com