Geode GXLV Processor Series Low Power Integrated x86 Solutions

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Geode GXLV Processor SeriesIntegrated Functions (Continued)4.4.3.3 Color PatternsSetting the pattern mode to 11b (GX_BASE+8200h[9:8] =11b), in the GP_RASTER_MODE register selects thecolor patterns. Bits [63:0] are used to hold a row of patterndata for an 8-bpp pattern, with bits [7:0] corresponding tothe leftmost pixel of the row. Likewise, bits [127:0] areused for a 16-bpp color pattern, with bits [15:0] correspondingto the leftmost pixel of the row.To support an 8x8 color pattern, software must load thepattern data for each row.4.4.4 Source ExpansionThe graphics pipeline contains hardware support for colorexpansion of source data (primarily used for text). Thosepixels corresponding to a clear bit (0) in the source dataare rendered using the color specified in theGP_SRC_COLOR_0 register (GX_BASE+810Ch), andthose pixels corresponding to a set bit (1) in the sourcedata are rendered using the color specified in theGP_SRC_COLOR_1 register (GX_BASE+810Eh).If the source transparency bit is set in theGP_RASTER_MODE register, those pixels correspondingto a clear bit (0) in the source data are not drawn.4.4.5 Raster OperationsThe GP_RASTER_MODE register specifies how the patterndata, source data (color-expanded if necessary), anddestination data are combined to produce the output tothe frame buffer. The definition of the ROP value matchesthat of the Microsoft API (application programming interface).This allows Windows display drivers to load the rasteroperation directly into hardware. Table 4-21 illustratesthis definition. Some common raster operations aredescribed in Table 4-22.Table 4-21. GP_RASTER_MODE Bit PatternsPattern(bit)Source(bit)Destination(bit)Output(bit)0 0 0 ROP[0]0 0 1 ROP[1]0 1 0 ROP[2]0 1 1 ROP[3]1 0 0 ROP[4]1 0 1 ROP[5]1 1 0 ROP[6]1 1 1 ROP[7]Table 4-22. Common Raster OperationsROPF0hCCh5Ah66h55hDescriptionOutput = PatternOutput = SourceOutput = Pattern XOR destinationOutput = Source XOR destinationOutput = ~Destinationwww.national.com 128 Revision 1.3
Integrated Functions (Continued)4.4.6 Graphics Pipeline Register DescriptionsThe graphics pipeline maps 200h locations starting atGX_BASE+8100h. Refer to Section 4.1.2 “Control Registers”on page 99 for instructions on accessing these registers.Table 4-23 summarizes the graphics pipelineregisters and Table 4-24 gives detailed register/bit formats.Table 4-23. Graphics Pipeline Configuration Register SummaryGX_BASE+Memory Offset Type Name / Function Default Value8100h-8103h R/W GP_DST/START_Y/XCOORDestination/Starting Y and X Coordinates Register: In BLT mode this registerspecifies the destination Y and X positions for a BLT operation. In Vector mode itspecifies the starting Y and X positions in a vector.00000000h8104-8107h R/W GP_WIDTH/HEIGHT and GP_VECTOR_LENGTH/INIT_ERRORWidth/Height or Vector Length/Initial Error Register: In BLT mode this registerspecifies the BLT width and height in pixels. In Vector mode it specifies the vectorinitial error and pixel length.8108h-810Bh R/W GP_SRC_X/YCOOR and GP_AXIAL/DIAG_ERRORSource X/Y Coordinate Axial/Diagonal Error Register: In BLT mode this registerspecifies the BLT X and Y source. In Vector mode it specifies the axial and diagonalerror for rendering a vector.810Ch-810Fh R/W GP_SRC_COLOR_0 and GP_SRC_COLOR_1Source Color Register: Determines the colors used when expanding monochromesource data in either the 8-bpp mode or the 16-bpp mode.8110h-8113h R/W GP_PAT_COLOR_0 and GP_PAT_COLOR_1Graphics Pipeline Pattern Color Registers 0 and1: These two registers determinethe colors used when expanding pattern data.8114h-8117h R/W GP_PAT_COLOR_2 and GP_PAT_COLOR_3Graphics Pipeline Pattern Color Registers 2 and 3: These two registers determinethe colors used when expanding pattern data.00000000h00000000h00000000h00000000h00000000h8120h-8123h R/W GP_PAT_DATA 0 through 300000000h8124h-8127h R/W Graphics Pipeline Pattern Data Registers 0 through 3: Together these registers 00000000h8128h-812Bh R/Wcontain 128 bits of pattern data.00000000h812Ch-812Fh R/WGP_PAT_DATA_0 corresponds to bits [31:0] of the pattern data.GP_PAT_DATA_1 corresponds to bits [63:32] of the pattern data.GP_PAT_DATA_2 corresponds to bits [95:64] of the pattern data.GP_PAT_DATA_3 corresponds to bits [127:96] of the pattern data.00000000h8140h-8143h(Note)8144h-8147h(Note)R/WR/WGP_VGA_WRITEGraphics Pipeline VGA Write Patch Control Register: Controls the VGA memorywrite path in the graphics pipeline.GP_VGA_READGraphics Pipeline VGA Read Patch Control Register: Controls the VGA memoryread path in the graphics pipeline.8200h-8203h R/W GP_RASTER_MODEGraphics Pipeline Raster Mode Register: This register controls the manipulationof the pixel data through the graphics pipeline. Refer to Section 4.4.5 “RasterOperations” on page 128.8204h-8207h R/W GP_VECTOR_MODEGraphics Pipeline Vector Mode Register: Writing to this register initiates the renderingof a vector.xxxxxxxxh00000000h00000000h00000000h8208h-820Bh R/W GP_BLT_MODE00000000hGraphics Pipeline BLT Mode Register: Writing to this initiates a BLT operation.Note: The registers at GX_BASE+8140, 8144h, 8210h, and 8214h are located in the area designated for the graphics pipeline butare used for VGA emulation purposes. Refer to Table 4-39 on page 165 for these register’s bit formats.Geode GXLV Processor SeriesRevision 1.3 129 www.national.com
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Geode GXLV Processor Series Low Pow
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