Geode GXLV Processor Series Low Power Integrated x86 Solutions

Geode GXLV Processor SeriesIntegrated Functions (Continued)4.5.13 FIFO Diagnostic RegistersThe FIFO Diagnostic Register group consists of two 32-bitregisters located at GX_BASE+8378h andBit Name DescriptionTable 4-34. FIFO Diagnostic RegistersGX_BASE+837Ch. These registers are summarized inTable 4-28 on page 141, and Table 4-33 gives their bit formatsGX_BASE+8378h-837Bh DC_DFIFO_DIAG Register (R/W) Default Value = xxxxxxxxh31:0 DISPLAY FIFODIAGNOSTICDATADisplay FIFO Diagnostic Read or Write Data: Before this register is accessed, the DIAG bit inDC_GENERAL_CFG register (see Table 4-29 on page 144) should be set high and the DFLE bitshould be set low. Since, each FIFO entry is 64 bits, an even number of write operations should beperformed. Each pair of write operations will cause the FIFO write pointer to increment automatically.After all write operations have been performed, a single read of don't care data should be performedto load data into the output latch. Each subsequent read will contain the appropriate datawhich was previously written. Each pair of read operations will cause the FIFO read pointer to incrementautomatically. A pause of at least four core clocks should be allowed between subsequent readoperations to allow adequate time for the shift to take place.GX_BASE+837Ch-837Fh DC_CFIFO_DIAG Register (R/W) Default Value = xxxxxxxxh31:0 COMPRESSEDFIFO DIAGNOS-TIC DATACompressed Data FIFO Diagnostic Read or Write Data: Before this register is accessed, theDIAG bit in DC_GENERAL_CFG (see Table 4-29 on page 144) register should be set high and theDFLE bit should be set low. Also, the DIAG bit in DC_OUTPUT_CFG (see Table 4-29) should be sethigh and the CFRW bit in DC_OUTPUT_CFG should be set low. After each write, the FIFO writepointer will automatically increment. After all write operations have been performed, the CFRW bit ofDC_OUTPUT_CFG should be set high to enable read addresses to the FIFO and a single read ofdon't care data should be performed to load data into the output latch. Each subsequent read willcontain the appropriate data which was previously written. After each read, the FIFO read pointerwill automatically increment.www.national.com 154 Revision 1.3