Geode GXLV Processor Series Low Power Integrated x86 Solutions

Geode GXLV Processor SeriesIntegrated Functions (Continued)4.3.3 SDRAM CommandsThis subsection discusses the SDRAM commands supportedby the memory controller. Table 4-12 summarizesthese commands followed by detailed operational informationregarding each command. Refer to SDRAM devicespecifications available from SDRAM manufacturer’s formore detailed information.Table 4-12. Basic Command Truth TableName Command CS RAS CAS WEMRS Mode Register Set L L L LPRE Bank Precharge L L H LACT Bank activate/rowaddressL L H HentryWRT Column address L H L Lentry/Write operationREAD Column address L H L Hentry/Read operationDESL Control input inhibit/ H X X XNo operationRFSH* CBR Refresh or Auto L L L HRefreshNote: *This command is CBR (CAS-before-RAS) refreshwhen CKE is high and self refresh when CKE is low.MRS — The Mode Register command defines the specificmode of operation of the SDRAM. This definition includesthe selection of burst length, burst type, and CAS latency.CAS latency is the delay, in clock cycles, between the registrationof a read command and the availability of the firstpiece of output data.The burst length is programmed by address bits MA[2:0],the burst type by address bit MA3 and the CAS latency byaddress bits MA[6:4].The memory controller only supports a burst length of twoand burst type of interleave.The field value on MA[12:0] and BA[1:0] during the MRScycleareasshowninTable4-13.PRE — The precharge command is used to deactivatethe open row in a particular component bank or the openrow in all (2 or 4, device dependent) component banks.Address pin MA10 determines whether one or all componentbanks are to be precharged. In the case where onlyone component bank is to be precharged, BA[1:0] selectswhich bank. Once a component bank has been precharged,it is in the Idle state and must be activated priorto any read or write commands.Table 4-13. Address Line Programming during MRS CyclesBA[1:0] MA[12:7] MA[6:4] MA3 MA[2:0]00 000000 CAS Latency:000 = Reserved010 = 2 CLK100 = 4 CLK110 = 6 CLK001 = 1 CLK011 = 3 CLK101 = 5 CLK111 = 7 CLK1Burst type is alwaysinterleave.001Burst length is always 2.128-bit transfer.www.national.com 110 Revision 1.3