Geode GXLV Processor Series Low Power Integrated x86 Solutions

Geode GXLV Processor SeriesSignal Definitions (Continued)2.1 PIN ASSIGNMENTSThe tables in this section use several common abbreviations.Table 2-1 lists the mnemonics and their meanings.Figure 2-3 shows the pin assignment for the 320 SPGAwith Table 2-4 and Table 2-5 listing the pin assignmentssorted by pin number and alphabetically by signal name,respectively.Figure 2-2 shows the pin assignment for the 352 BGA withTable 2-2 and Table 2-3 listing the pin assignments sortedby pin number and alphabetically by signal name, respectively.InSection2.2“SignalDescriptions”onpage31adescriptionof each signal is provided within its associated functionalgroup.Table 2-1. Pin Type DefinitionsMnemonicDefinitionIStandard input pin.I/OBidirectional pin.OTotem-pole output.ODOpen-drain output structure thatallows multiple devices to share thepin in a wired-OR configuration.PUPull-up resistor.PDPull-down resistor.s/t/sSustained tri-state an active-low tristatesignal owned and driven byone and only one agent at a time.The agent that drives an s/t/s pin lowmust drive it high for at least oneclock before letting it float. A newagent cannot start driving an s/t/ssignal any sooner than one clockafter the previous owner lets it float.A pull-up resistor on the motherboardis required to sustain the inactivestate until another agent drivesit.VCC (PWR) Power pin.VSS (GND) Ground pin.# The "#" symbol at the end of a signalname indicates that the active, orasserted state occurs when the signalis at a low voltage level. When"#" is not present after the signalname, the signal is asserted when ata high voltage level.t/sTri-state signal.www.national.com 20 Revision 1.3