Geode GXLV Processor Series Low Power Integrated x86 Solutions

Geode GXLV Processor SeriesInstruction Set (Continued)7.3 PROCESSOR CORE INSTRUCTION SETThe instruction set for the GXLV processor core is summarizedin Table 7-27. The table uses several symbolsand abbreviations that are described next and listed inTable 7-26.7.3.1 OpcodesOpcodes are given as hex values except when theyappear within brackets as binary values.7.3.2 Clock CountsThe clock counts listed in the instruction set summarytable are grouped by operating mode (real and protected)and whether there is a register/cache hit or a cache miss.In some cases, more than one clock count is shown in acolumn for a given instruction, or a variable is used in theclock count.7.3.3 FlagsThere are nine flags that are affected by the execution ofinstructions. The flag names have been abbreviated and variousconventions used to indicate what effect the instructionhas on the particular flag.Table 7-26. Processor Core Instruction SetTable LegendSymbol orAbbreviationDescriptionOpcode# Immediate 8-bit data.## Immediate 16-bit data.### Full immediate 32-bit data (8, 16, 32 bits).+ 8-bit signed displacement.+++ Full signed displacement (16, 32 bits).Clock Count/ Register operand/memory operand.n Number of times operation is repeated.L Level of the stack frame.| Conditional jump taken | Conditional jump nottaken. (e.g. “4|1” = 4 clocks if jump taken, 1clock if jump not taken).\ CPL ≤ IOPL \ CPL > IOPL(where CPL = Current Privilege Level, IOPL =I/O Privilege Level).FlagsOF Overflow Flag.DF Direction Flag.IF Interrupt Enable Flag.TF Trap Flag.SF Sign Flag.ZF Zero Flag.AF Auxiliary Flag.PF Parity Flag.CF Carry Flag.x Flag is modified by the instruction.- Flag is not changed by the instruction.0 Flag is reset to “0”.1 Flag is set to “1”.u Flag is undefined following execution theinstruction.www.national.com 216 Revision 1.3