Geode GXLV Processor Series Low Power Integrated x86 Solutions

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Geode GXLV Processor SeriesProcessor Programming (Continued)3.5.2 Segment MechanismsMemory is divided into contiguous regions called “segments.”The segments allow the partitioning of individualelements of a program. Each segment provides a zeroaddress-based private memory for such elements ascode, data, and stack space.The segment mechanisms select a segment in memory.Memory is divided into an arbitrary number of segments,each containing usually much less than the 2 32 byte (4GB) maximum.There are two segment mechanisms, one for real and virtual8086 operating modes, and one for protected mode.3.5.2.1 Real Mode Segment MechanismIn real mode operation, the CPU addresses only the lowest1 MB of memory. In this mode a selector located inone of the segment registers is used to locate a segment.To calculate a physical memory address, the 16-bit segmentbase address located in the selected segment registeris multiplied by 16 and then a 16-bit offset address isadded. The resulting 20-bit address is then extended withtwelve zeros in the upper address bits to create a 32-bitphysical address.The value of the selector (the INDEX field) is multiplied by16 to produce a base address (see Figure 3-4). The baseaddress is summed with the instruction offset value to producea physical address.3.5.2.2 Virtual 8086 Mode Segment MechanismIn virtual 8086 mode the operation is performed as in realmode except that a paging mechanism is added. Whenpaging is enabled, the paging mechanism translates thelinear address into a physical address using cached lookuptables (refer to Section 3.5.4 “Paging Mechanism” onpage 77).000h12 High Order Address BitsOffset MechanismOffset Address16122032 Linear Address(Physical Address)Selected SegmentRegister16X1620Base AddressFigure 3-4. Real Mode Address Calculationwww.national.com 66 Revision 1.3
Processor Programming (Continued)3.5.2.3 Segment Mechanism in Protected ModeThe segment mechanism in protected mode is more complex.Basically as in real and virtual 8086 modes the offsetaddress is added to the segment base address to producea linear address (Figure 3-5). However, the calculationof the segment base address is based on thecontents of descriptor tables.If paging is enabled the linear address is further processedby the paging mechanism.A more detailed look at the segment mechanisms for realand virtual 8086 modes and protected modes is illustratedin Figure 3-6 on page 68. In protected mode, the segmentselector is cached. This is illustrated in Figure 3-7 on page69.3.5.2.4 Segment SelectorsThe segment registers are used to store segment selectors.In protected mode, the segment selectors aredivided in to three fields: the RPL, TI and INDEX fields asshown in Figure 3-6 on page 68.The segments are assigned permission levels to preventapplication program errors from disrupting operating programs.The Requested Privilege Level (RPL) determinesthe effective privilege level of an instruction. RPL = 0 indicatesthe most privileged level, and RPL = 3 indicates theleast privileged level. Refer to Section 3.9 “Protection” onpage 91.Descriptor tables hold descriptors that allow managementof segments and tables in address space while in protectedmode. The Table Indicator Bit (TI) in the selectorselects either the General Descriptor Table (GDT) or oneLocal Descriptor Table (LDT). If TI = 0, GDT is selected; ifTI =1, LDT is selected. The 13-bit INDEX field in the segmentselector is used to index a GDT or LDT.Geode GXLV Processor SeriesOffset Mechanism32Offset AddressSelector Mechanism32Segment BaseAddress32LinearAddressOptionalPaging Mechanism32PhysicalMemoryAddressFigure 3-5. Protected Mode Address CalculationRevision 1.3 67 www.national.com
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Geode GXLV Processor Series Low Pow
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