Geode GXLV Processor Series Low Power Integrated x86 Solutions

Geode GXLV Processor SeriesIntegrated Functions (Continued)4.7.8.2 PCI Write TransactionA PCI write transaction is similar to a PCI read transaction,consisting of an address phase and one or more dataphases. Since the master provides both address anddata, no turnaround cycle is required following theaddress phase. The data phases work the same for bothread and write transactions. Figure 4-19 illustrates a writetransaction.CLKTheaddressphasebeginsonclock2whenFRAME#isasserted. The first and second data phases completewithout delays. During data phase 3, the target insertsthree wait cycles by deasserting TRDY#.For additional information refer to Chapter 3.3.2, WriteTransaction, of the PCI Local Bus Specification, Revision2.1.FRAME#ADADDRDATA-1DATA-2DATA-3C/BE#BUS CMDBE#s-1BE#s-2BE#s-3IRDY#TRDY#DATA TRANSFERDATA TRANSFERWAITWAITWAITDATA TRANSFERDEVSEL#ADDRPHASEDATAPHASEDATAPHASEDATAPHASEBUS TRANSACTIONFigure 4-19. Basic Write Operationwww.national.com 174 Revision 1.3