Geode GXLV Processor Series Low Power Integrated x86 Solutions

More documents

Recommendations

Info

Geode GXLV Processor SeriesTable of Contents1.0 ArchitectureOverview.............................................101.1 INTEGERUNIT ..........................................................111.2 FLOATINGPOINTUNIT ...................................................111.3 WRITE-BACKCACHEUNIT ................................................111.4 MEMORYMANAGEMENTUNIT .............................................111.5 INTERNALBUSINTERFACEUNIT...........................................111.6 INTEGRATED FUNCTIONS . . . . ............................................121.6.1 Graphics Accelerator . . . ............................................121.6.2 DisplayController ..................................................121.6.3 XpressRAMMemorySubsystem ......................................121.6.4 PCIController.....................................................121.7 GEODEGXLV/CS5530SYSTEMDESIGNS ....................................131.7.1 ReferenceDesigns.................................................162.0 SignalDefinitions.................................................192.1 PINASSIGNMENTS ......................................................202.2 SIGNALDESCRIPTIONS ..................................................312.2.1 SystemInterfaceSignals ............................................312.2.2 PCIInterfaceSignals ...............................................332.2.3 MemoryControllerInterfaceSignals ...................................362.2.4 VideoInterfaceSignals .............................................372.2.5 Power,Ground,andNoConnectSignals................................392.2.6 InternalTestandMeasurementSignals.................................393.0 ProcessorProgramming ...........................................413.1 COREPROCESSORINITIALIZATION ........................................413.2 INSTRUCTIONSETOVERVIEW.............................................423.2.1 LockPrefix .......................................................423.3 REGISTERSETS.........................................................433.3.1 ApplicationRegisterSet.............................................433.3.1.1 GeneralPurposeRegisters ..........................................433.3.1.2 SegmentRegisters ................................................453.3.1.3 InstructionPointerRegister ..........................................453.3.1.4 EFLAGSRegister .................................................463.3.2 SystemRegisterSet ...............................................473.3.2.1 ControlRegisters..................................................483.3.2.2 ConfigurationRegisters .............................................503.3.2.3 DebugRegisters ..................................................553.3.2.4 TLBTestRegisters ................................................573.3.2.5 CacheTestRegisters ..............................................593.3.3 ModelSpecificRegisterSet ..........................................623.3.4 TimeStampCounter ...............................................623.4 ADDRESSSPACES.......................................................633.4.1 I/OAddressSpace .................................................633.4.2 MemoryAddressSpace.............................................64www.national.com 4 Revision 1.3
Table of Contents (Continued)3.5 OFFSET,SEGMENT,ANDPAGINGMECHANISMS .............................643.5.1 Offset Mechanism . . . . . ............................................643.5.2 SegmentMechanisms ..............................................663.5.2.1 RealModeSegmentMechanism .....................................663.5.2.2 Virtual8086ModeSegmentMechanism................................663.5.2.3 SegmentMechanisminProtectedMode................................673.5.2.4 SegmentSelectors ................................................673.5.3 Descriptors .......................................................703.5.3.1 GlobalandLocalDescriptorTableRegisters.............................703.5.3.2 SegmentDescriptors ...............................................703.5.3.3 Task, Gate, Interrupt, and Application and System Descriptors . . . . . . . . . . . . . . 713.5.4 PagingMechanism.................................................773.6 INTERRUPTSANDEXCEPTIONS ...........................................793.6.1 Interrupts ........................................................793.6.2 Exceptions .......................................................793.6.3 InterruptVectors ...................................................803.6.3.1 InterruptVectorAssignments.........................................803.6.3.2 InterruptDescriptorTable ...........................................803.6.4 InterruptandExceptionPriorities ......................................813.6.5 ExceptionsinRealMode ............................................823.6.6 ErrorCodes ......................................................823.7 SYSTEMMANAGEMENTMODE ............................................833.7.1 SMMOperation ...................................................843.7.2 SMI#Pin.........................................................853.7.3 SMMConfigurationRegisters ........................................853.7.4 SMMMemorySpaceHeader.........................................853.7.5 SMMInstructions ..................................................873.7.6 SMMMemorySpace ...............................................883.7.7 SMIGenerationforVirtualVGA .......................................883.7.8 SMMServiceRoutineExecution ......................................883.7.8.1 SMINesting ......................................................883.7.8.2 CPUStatesRelatedtoSMMandSuspendMode.........................903.8 HALTANDSHUTDOWN ...................................................913.9 PROTECTION ...........................................................913.9.1 PrivilegeLevels ...................................................913.9.2 I/OPrivilegeLevels ................................................913.9.3 PrivilegeLevelTransfers ............................................923.9.3.1 Gates ...........................................................933.9.4 InitializationandTransitiontoProtectedMode............................933.10 VIRTUAL8086MODE .....................................................933.10.1 MemoryAddressing ................................................933.10.2 Protection ........................................................933.10.3 Interrupt Handling . . . . . . ............................................933.10.4 EnteringandLeavingVirtual8086Mode................................933.11 FLOATINGPOINTUNITOPERATIONS .......................................943.11.1 FPURegisterSet ..................................................943.11.2 FPUTagWordRegister .............................................943.11.3 FPUStatusRegister ...............................................943.11.4 FPUModeControlRegister ..........................................94Geode GXLV Processor SeriesRevision 1.3 5 www.national.com
Page 6 and 7: Geode GXLV Processor SeriesTable of
Page 8: Geode GXLV Processor SeriesTable of
Page 12 and 13: Geode GXLV Processor SeriesArchitec
Page 15 and 16: Architecture Overview (Continued)Ge
Page 17 and 18: Architecture Overview (Continued)SD
Page 19 and 20: 2.0 Signal DefinitionsThis section
Page 21 and 22: Signal Definitions (Continued)Index
Page 23 and 24: Signal Definitions (Continued)PinNo
Page 25 and 26: Signal Definitions (Continued)Table
Page 27 and 28: Signal Definitions (Continued)PinNo
Page 29 and 30: Signal Definitions (Continued)Table
Page 31 and 32: Signal Definitions (Continued)2.2 S
Page 33 and 34: Signal Definitions (Continued)2.2.2
Page 41 and 42: 3.0 Processor ProgrammingThis secti
Page 43 and 44: Processor Programming (Continued)3.
Page 49 and 50: Processor Programming (Continued)Bi
Page 51 and 52: Processor Programming (Continued)Ta
Page 53 and 54:
Processor Programming (Continued)Bi
Page 55 and 56:
Processor Programming (Continued)3.
Page 57 and 58:
Page 59 and 60:
Page 61 and 62:
Processor Programming (Continued)Th
Page 63 and 64:
Page 65 and 66:
Processor Programming (Continued)Ad
Page 67 and 68:
Page 69 and 70:
Processor Programming (Continued)Se
Page 71 and 72:
Page 73 and 74:
Processor Programming (Continued)TY
Page 75 and 76:
Processor Programming (Continued)Ta
Page 77 and 78:
Page 79 and 80:
Page 81 and 82:
Page 83 and 84:
Page 85 and 86:
Page 87 and 88:
Page 89 and 90:
Processor Programming (Continued)Wh
Page 91 and 92:
Page 93 and 94:
Page 95 and 96:
Processor Programming (Continued)Bi
Page 97 and 98:
Integrated Functions (Continued)4.1
Page 99 and 100:
Page 101 and 102:
Integrated Functions (Continued)Mne
Page 103 and 104:
Page 105 and 106:
Integrated Functions (Continued)Bit
Page 107 and 108:
Page 109 and 110:
Page 111 and 112:
Integrated Functions (Continued)ACT
Page 113 and 114:
Page 115 and 116:
Page 117 and 118:
Page 119 and 120:
Integrated Functions (Continued)Tab
Page 121 and 122:
Integrated Functions (Continued)SDR
Page 123 and 124:
Page 125 and 126:
Page 127 and 128:
Page 129 and 130:
Page 131 and 132:
Page 133 and 134:
Page 135 and 136:
Page 137 and 138:
Integrated Functions (Continued).Re
Page 139 and 140:
Integrated Functions (Continued)640
Page 141 and 142:
Page 143 and 144:
Integrated Functions (Continued)GX_
Page 145 and 146:
Integrated Functions (Continued)11:
Page 147 and 148:
Page 149 and 150:
Integrated Functions (Continued)9:0
Page 151 and 152:
Page 153 and 154:
Page 155 and 156:
Page 157 and 158:
Page 159 and 160:
Page 161 and 162:
Page 163 and 164:
Page 165 and 166:
Page 167 and 168:
Page 169 and 170:
Page 171 and 172:
Page 173 and 174:
Page 175 and 176:
Page 177 and 178:
Power Management (Continued)CPU Sus
Page 179 and 180:
Power Management (Continued)5.2.2 I
Page 181 and 182:
Power Management (Continued)5.3 POW
Page 183 and 184:
Power Management (Continued)Table 5
Page 185 and 186:
Electrical Specifications (Continue
Page 187 and 188:
Page 189 and 190:
Page 191 and 192:
Page 193 and 194:
Page 195 and 196:
Page 197 and 198:
Page 199 and 200:
Page 201 and 202:
Page 203 and 204:
Page 205 and 206:
Page 207 and 208:
7.0 Instruction SetThis section sum
Page 209 and 210:
Instruction Set (Continued)7.1.2.3
Page 211 and 212:
Page 213 and 214:
Page 215 and 216:
Page 217 and 218:
Instruction Set (Continued)Table 7-
Page 219 and 220:
Instruction Set (Continued)Instruct
Page 221 and 222:
Instruction Set (Continued)JMP Unco
Page 223 and 224:
Page 225 and 226:
Page 227 and 228:
Page 229 and 230:
Page 231 and 232:
Page 233 and 234:
Instruction Set (Continued)7.5 MMX
Page 235 and 236:
Instruction Set (Continued)PCMPEQB
Page 237 and 238:
Instruction Set (Continued)PUNPCKHW
Page 239 and 240:
Page 241 and 242:
Package Specifications (Continued)C
Page 243 and 244:
Package Specifications (Continued)8
Page 245 and 246:
Package Specifications (Continued)S
Page 247:
Geode GXLV Processor Series Low Pow
show all

Geode GXLV Processor Series Low Power Integrated x86 Solutions

Create successful ePaper yourself

Delete template?

Save as template?