Geode GXLV Processor Series Low Power Integrated x86 Solutions

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Geode GXLV Processor SeriesInstruction Set (Continued)InstructionTable 7-27. Processor Core Instruction Set Summary (Continued)OpcodeLEA Load Effective AddressNo Index Register 8D [mod reg r/m] - - - - - - - - - 1 1With Index Register 1 1LES Load Pointer to ES C4 [mod reg r/m] - - - - - - - - - 4 9 b h,i,jLFS Load Pointer to FS 0F B4 [mod reg r/m] - - - - - - - - - 4 9 b h,i,jLGDT Load GDT Register 0F 01 [mod 010 r/m] - - - - - - - - - 10 10 b,c h,lLGS Load Pointer to GS 0F B5 [mod reg r/m] - - - - - - - - - 4 9 b h,i,jLIDT Load IDT Register 0F 01 [mod 011 r/m] - - - - - - - - - 10 10 b,c h,lLLDT Load LDT RegisterFrom Register/Memory 0F 00 [mod 010 r/m] - - - - - - - - - 8 a g,h,j,lLMSW Load Machine Status WordFrom Register/Memory 0F 01 [mod 110 r/m] - - - - - - - - - 11 11 b,c h,lLODS Load String A [110 w] - - - - - - - - - 3 3 b hLSL Load Segment LimitFrom Register/Memory 0F 03 [mod reg r/m] - - - - - x - - - 9 a g,h,j,pLSS Load Pointer to SS 0F B2 [mod reg r/m] - - - - - - - - - 4 10 a h,i,jLTR Load Task RegisterFrom Register/Memory 0F 00 [mod 011 r/m] - - - - - - - - - 9 a g,h,j,lLEAVE Leave Current Stack Frame C9 - - - - - - - - - 4 4 b hLOOP Offset Loop/No Loop E2 + - - - - - - - - - 2 2 rLOOPNZ/LOOPNE Offset E0 + - - - - - - - - - 2 2 rLOOPZ/LOOPE Offset E1 + - - - - - - - - - 2 2 rMOV Move DataRegister to Register 8 [10dw] [11 reg r/m] - - - - - - - - - 1 1 b h,i,jRegister to Memory 8 [100w] [mod reg r/m] 1 1Register/Memory to Register 8 [101w] [mod reg r/m] 1 1Immediate to Register/Memory C [011w] [mod 000 r/m] ### 1 1Immediate to Register (short form) B [w reg] ### 1 1Memory to Accumulator (short form) A [000w] +++ 1 1Accumulator to Memory (short form) A [001w] +++ 1 1Register/Memory to Segment Register 8E [mod sreg3 r/m] 1 6Segment Register to Register/Memory 8C [mod sreg3 r/m] 1 1MOV Move to/from Control/Debug/Test RegsRegister to CR0/CR2/CR3/CR4 0F 22 [11 eee reg] - - - - - - - - - 20/5/5 18/5/6 lCR0/CR2/CR3/CR4 to Register 0F 20 [11 eee reg] 6 6Register to DR0-DR3 0F 23 [11 eee reg] 10 10DR0-DR3 to Register 0F 21 [11 eee reg] 9 9Register to DR6-DR7 0F 23 [11 eee reg] 10 10DR6-DR7 to Register 0F 21 [11 eee reg] 9 9Register to TR3-5 0F 26 [11 eee reg] 16 16TR3-5 to Register 0F 24 [11 eee reg] 8 8Register to TR6-TR7 0F 26 [11 eee reg] 11 11TR6-TR7toRegister 0F24[11eeereg] 3 3MOVS Move String A [010w] - - - - - - - - - 6 6 b hMOVSX Move with Sign ExtensionRegister from Register/Memory 0F B[111w] [mod reg r/m] - - - - - - - - - 1 1 b hMOVZX MovewithZeroExtensionRegister from Register/Memory 0F B[011w] [mod reg r/m] - - - - - - - - - 1 1 b hMUL Unsigned MultiplyAccumulator with Register/MemoryF [011w] [mod 100 r/m] x - - - x x u u xb hMultiplier: ByteWordDoubleword45154515FlagsO D I T S Z A P CF F F F F F F F FRealModeProt’dModeClock Count(Reg/Cache Hit)RealModeProt’dModeIssueswww.national.com 222 Revision 1.3
Instruction Set (Continued)InstructionNEG Negate Integer F [011w] [mod 011 r/m] x - - - x x x x x 1 1 b hNOP No Operation 90 - - - - - - - - - 1 1NOT Boolean Complement F [011w] [mod 010 r/m] - - - - - - - - - 1 1 b hOIO Official Invalid Opcode 0F FF - - x 0 - - - - - 1 8-125OR Boolean ORRegister to Register 0 [10dw] [11 reg r/m] 0 - - - x x u x 0 1 1 b hRegister to Memory 0 [100w] [mod reg r/m] 1 1Memory to Register 0 [101w] [mod reg r/m] 1 1Immediate to Register/Memory 8 [00sw] [mod 001 r/m] ### 1 1Immediate to Accumulator 0 [110w] ### 1 1OUT Output to PortFixed Port E [011w] # - - - - - - - - - 14 14/28 mVariable Port E [111w] 14 14/28OUTS Output String 6 [111w] - - - - - - - - - 15 15/29 b h,mPOP Pop Value off StackRegister/Memory 8F [mod 000 r/m] - - - - - - - - - 1/4 1/4 b h,i,jRegister (short form) 5 [1 reg] 1 1Segment Register (ES, SS, DS) [000 sreg2 111] 1 6Segment Register (FS, GS) 0F [10 sreg3 001] 1 6POPA Pop All General Registers 61 - - - - - - - - - 9 9 b hPOPF Pop Stack into FLAGS 9D x x x x x x x x x 8 8 b h,nPREFIX BYTESAssert Hardware LOCK Prefix F0 - - - - - - - - - mAddress Size Prefix 67Operand Size Prefix 66Segment Override Prefix-CS-DS-ES-FS-GS-SSPUSH Push Value onto StackTable 7-27. Processor Core Instruction Set Summary (Continued)2E3E26646536OpcodeRegister/Memory FF [mod 110 r/m] - - - - - - - - - 1/3 1/3 b hRegister (short form) 5 [0 reg] 1 1Segment Register (ES, CS, SS, DS) [000 sreg2 110] 1 1Segment Register (FS, GS) 0F [10 sreg3 000] 1 1Immediate 6 [10s0] ### 1 1PUSHA Push All General Registers 60 - - - - - - - - - 11 11 b hPUSHF Push FLAGS Register 9C - - - - - - - - - 2 2 b hRCL Rotate Through Carry LeftRegister/Memory by 1 D [000w] [mod 010 r/m] x - - - - - - - x 3 3 b hRegister/Memory by CL D [001w] [mod 010 r/m] u - - - - - - - x 8 8Register/Memory by Immediate C [000w] [mod 010 r/m] # u - - - - - - - x 8 8RCR Rotate Through Carry RightRegister/Memory by 1 D [000w] [mod 011 r/m] x - - - - - - - x 4 4 b hRegister/Memory by CL D [001w] [mod 011 r/m] u - - - - - - - x 8 8Register/Memory by Immediate C [000w] [mod 011 r/m] # u - - - - - - - x 8 8RDMSR Read Tmodel Specific Register 0F 32 - - - - - - - - -RDTSC Read Time Stamp Counter 0F 31 - - - - - - - - -REP INS Input String F3 6[110w] - - - - - - - - - 17+4n 17+4n\ b h,m32+4nREP LODS Load String F3 A[110w] - - - - - - - - - 9+2n 9+2n b hREP MOVS Move String F3 A[010w] - - - - - - - - - 12+2n 12+2n b hFlagsO D I T S Z A P CF F F F F F F F FRealModeProt’dModeClock Count(Reg/Cache Hit)RealModeProt’dModeIssuesGeode GXLV Processor SeriesRevision 1.3 223 www.national.com
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Geode GXLV Processor SeriesTable of
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Geode GXLV Processor SeriesArchitec
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Architecture Overview (Continued)Ge
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Architecture Overview (Continued)SD
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2.0 Signal DefinitionsThis section
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Signal Definitions (Continued)Index
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Signal Definitions (Continued)PinNo
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Signal Definitions (Continued)Table
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Signal Definitions (Continued)PinNo
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Signal Definitions (Continued)Table
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Signal Definitions (Continued)2.2 S
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3.0 Processor ProgrammingThis secti
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Geode GXLV Processor Series Low Power Integrated x86 Solutions

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