Geode GXLV Processor Series Low Power Integrated x86 Solutions

More documents

Recommendations

Info

Geode GXLV Processor SeriesProcessor Programming (Continued)3.5.3 Descriptors3.5.3.1 Global and Local Descriptor Table RegistersThe GDT and LDT descriptor tables are defined by theGlobal Descriptor Table Register (GDTR) and the LocalDescriptor Table Register (LDTR) respectively. Some textsrefer to these registers as GDT and LDT descriptors.The following instructions are used in conjunction with theGDT and LDT registers:• LGDT - Load memory to GDTR• LLDT - Load memory to LDTR• SGDT - Store GDTR to memory• SLDT - Store LDTR to memoryThe GDTR is set up in real mode using the LGDT instruction.This is possible as the LGDT instruction is one of twoinstructions that directly load a linear address (instead ofa segment relative address) in protected mode. (The otherinstruction is the Load Interrupt Descriptor Table [LIDT]).As shown in Table 3-20, the GDTR contains a BASE fieldand a LIMIT field that define the GDTs. The InterruptDescriptor Table Register (IDTR) is described in Section3.5.3.3 “Task, Gate, Interrupt, and Application and SystemDescriptors” on page 71.Also shown in Table 3-20, the LDTR is only two bytes wideas it contains only a SELECTOR field. The contents of theSELECTOR field point to a descriptor in the GDT.3.5.3.2 Segment DescriptorsThere are several types of descriptors. A segmentdescriptor defines the base address, limit, and attributesof a memory segment.The GDT or LDT can hold several types of descriptors. Inparticular, the segment descriptors are stored in either oftwo registers, the GDT or the LDT. Either of these tablescan store as many as 8,192 (2 13 ) 8-byte selectors takingas much as 64 KB of memory.The first descriptor in the GDT (location 0) is not used bythe CPU and is referred to as the “null descriptor.”Types of Segment DescriptorsThe type of memory segments are defined by correspondingtypes of segment descriptors:• Code Segment Descriptors• Data Segment Descriptors• Stack Segment Descriptors• LDT Segment DescriptorsTable 3-20.GDT, LDT and IDT Registers47 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0GDT RegisterIDT RegisterBASEBASEGlobal Descriptor Table RegisterInterrupt Descriptor Table RegisterLDT RegisterLIMITLIMITLocal Descriptor Table RegisterSELECTORwww.national.com 70 Revision 1.3
Processor Programming (Continued)3.5.3.3 Task, Gate, Interrupt, and Application andSystem DescriptorsBesides segment descriptors there are descriptors usedin task switching, switching between tasks with differentpriority and those used to control interrupt functions:• Interrupt Descriptors• Application and System Segment Descriptors• Gate Descriptors• Task State Segment DescriptorsAll descriptors have some things in common. They are alleight bytes in length and have three fields (BASE, LIMIT,and TYPE). The BASE field defines the starting locationfor the table or segment. The LIMIT field defines the sizeand the TYPE field depends on the type of descriptor.One of the main functions of the TYPE field is to definethe access rights to the associated segment or table.Interrupt DescriptorsThe Interrupt Descriptor Table is an array of 256 8-byte (4-byte for real mode) interrupt descriptors, each of which isused to point to an interrupt service routine. Every interruptthat may occur in the system must have an associatedentry in the IDT. The contents of the IDTR arecompletely visible to the programmer through the use ofthe SIDT instruction.The IDT is defined by the Interrupt Descriptor Table Register(IDTR). Some texts refer to this register as an IDTdescriptor.ThefollowinginstructionsareusedinconjunctionwiththeIDTR:• LIDT - Load memory to IDTR• SIDT-StoreIDTRtomemoryThe IDTR is set up in real mode using the LIDT instruction.This is possible as the LIDT instruction is only one oftwo instructions that directly load a linear address (insteadof a segment relative address) in protected mode (theother instructions is LGDT).As previously shown in Table 3-20 on page 70, the IDTRcontains a BASE ADDRESS field and a LIMIT field thatdefine the IDT tables.Application and System Segment DescriptorsThe bit structure and bit definitions for segment descriptorsare shown in Table 3-21 and Table 3-22 on page 72,respectively. The explanation of the TYPE field is showninTable3-23onpage73.Geode GXLV Processor SeriesTable 3-21. Application and System Segment Descriptors31 31 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0Memory Offset +4BASE[31:24] G D 0 AVLLIMIT[19:16] P DPL S TYPE BASE[23:16]Memory Offset +0BASE[15:0]LIMIT[15:0]Revision 1.3 71 www.national.com
Page 4 and 5:
Geode GXLV Processor SeriesTable of
Page 6 and 7:
Page 8:
Page 12 and 13:
Geode GXLV Processor SeriesArchitec
Page 15 and 16:
Architecture Overview (Continued)Ge
Page 17 and 18:
Architecture Overview (Continued)SD
Page 19 and 20: 2.0 Signal DefinitionsThis section
Page 21 and 22: Signal Definitions (Continued)Index
Page 23 and 24: Signal Definitions (Continued)PinNo
Page 25 and 26: Signal Definitions (Continued)Table
Page 27 and 28: Signal Definitions (Continued)PinNo
Page 29 and 30: Signal Definitions (Continued)Table
Page 31 and 32: Signal Definitions (Continued)2.2 S
Page 33 and 34: Signal Definitions (Continued)2.2.2
Page 41 and 42: 3.0 Processor ProgrammingThis secti
Page 43 and 44: Processor Programming (Continued)3.
Page 49 and 50: Processor Programming (Continued)Bi
Page 51 and 52: Processor Programming (Continued)Ta
Page 61 and 62: Processor Programming (Continued)Th
Page 65 and 66: Processor Programming (Continued)Ad
Page 69: Processor Programming (Continued)Se
Page 73 and 74: Processor Programming (Continued)TY
Page 75 and 76: Processor Programming (Continued)Ta
Page 89 and 90: Processor Programming (Continued)Wh
Page 97 and 98: Integrated Functions (Continued)4.1
Page 101 and 102: Integrated Functions (Continued)Mne
Page 105 and 106: Integrated Functions (Continued)Bit
Page 111 and 112: Integrated Functions (Continued)ACT
Page 119 and 120: Integrated Functions (Continued)Tab
Page 121 and 122:
Integrated Functions (Continued)SDR
Page 123 and 124:
Integrated Functions (Continued)4.3
Page 125 and 126:
Page 127 and 128:
Page 129 and 130:
Page 131 and 132:
Integrated Functions (Continued)Bit
Page 133 and 134:
Page 135 and 136:
Page 137 and 138:
Integrated Functions (Continued).Re
Page 139 and 140:
Integrated Functions (Continued)640
Page 141 and 142:
Page 143 and 144:
Integrated Functions (Continued)GX_
Page 145 and 146:
Integrated Functions (Continued)11:
Page 147 and 148:
Integrated Functions (Continued)Tab
Page 149 and 150:
Integrated Functions (Continued)9:0
Page 151 and 152:
Page 153 and 154:
Page 155 and 156:
Page 157 and 158:
Page 159 and 160:
Page 161 and 162:
Page 163 and 164:
Integrated Functions (Continued)Tab
Page 165 and 166:
Page 167 and 168:
Page 169 and 170:
Page 171 and 172:
Page 173 and 174:
Page 175 and 176:
Page 177 and 178:
Power Management (Continued)CPU Sus
Page 179 and 180:
Power Management (Continued)5.2.2 I
Page 181 and 182:
Power Management (Continued)5.3 POW
Page 183 and 184:
Power Management (Continued)Table 5
Page 185 and 186:
Electrical Specifications (Continue
Page 187 and 188:
Page 189 and 190:
Page 191 and 192:
Page 193 and 194:
Page 195 and 196:
Page 197 and 198:
Page 199 and 200:
Page 201 and 202:
Page 203 and 204:
Page 205 and 206:
Page 207 and 208:
7.0 Instruction SetThis section sum
Page 209 and 210:
Instruction Set (Continued)7.1.2.3
Page 211 and 212:
Page 213 and 214:
Page 215 and 216:
Page 217 and 218:
Instruction Set (Continued)Table 7-
Page 219 and 220:
Instruction Set (Continued)Instruct
Page 221 and 222:
Instruction Set (Continued)JMP Unco
Page 223 and 224:
Page 225 and 226:
Page 227 and 228:
Page 229 and 230:
Page 231 and 232:
Page 233 and 234:
Instruction Set (Continued)7.5 MMX
Page 235 and 236:
Instruction Set (Continued)PCMPEQB
Page 237 and 238:
Instruction Set (Continued)PUNPCKHW
Page 239 and 240:
Page 241 and 242:
Package Specifications (Continued)C
Page 243 and 244:
Package Specifications (Continued)8
Page 245 and 246:
Package Specifications (Continued)S
Page 247:
Geode GXLV Processor Series Low Pow
show all

Geode GXLV Processor Series Low Power Integrated x86 Solutions

Create successful ePaper yourself

Delete template?

Save as template?