Geode GXLV Processor Series Low Power Integrated x86 Solutions

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Geode GXLV Processor SeriesProcessor Programming (Continued)Table 3-2. Application Register Set31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0General Purpose RegistersAXAHALEAX (Extended A Register)BXBHBLEBX (Extended B Register)CXCHCLECX (Extended C Register)DXDHDLEDX (Extended D Register)SI (Source Index)ESI (Extended Source Index)DI (Destination Index)EDI (Extended Destination Index)BP (Base Pointer)EBP (Extended Base Pointer)SP (Stack Pointer)ESP (Extended Stack Pointer)Segment (Selector) RegistersCS (Code Segment)SS (Stack Segment)DS (D Data Segment)ES (E Data Segment)FS (F Data Segment)GS (G Data Segment)Instruction Pointer and EFLAGS RegistersEIP (Extended Instruction Pointer)ESP (Extended EFLAGS Register)www.national.com 44 Revision 1.3
Processor Programming (Continued)3.3.1.2 Segment RegistersThe 16-bit segment registers, part of the main memoryaddressing mechanism, are described in Section 3.5 “Offset,Segment, and Paging Mechanisms” on page 64. Thesix segment registers are:CS - Code SegmentDS - Data SegmentSS - Stack SegmentES - Extra SegmentFS - Additional Data SegmentGS - Additional Data SegmentThe segment registers are used to select segments inmain memory. A segment acts as private memory for differentelements of a program such as code space, dataspace and stack space.There are two segment mechanisms, one for real and virtual8086 operating modes and one for protected mode.Initialization and transition to protected mode is describedin Section 3.9.4 “Initialization and Transition to ProtectedMode” on page 93. The segment mechanisms aredescribed in Section 3.5.2 “Segment Mechanisms” onpage 66.The active segment register is selected according to theruleslistedinTable3-3andthetypeofinstructionbeingcurrently processed. In general, the DS register selector isused for data references. Stack references use the SSregister, and instruction fetches use the CS register. Whilesome selections may be overridden, instruction fetches,stack operations, and the destination write operation ofstring operations cannot be overridden. Special segmentoverrideinstruction prefixes allow the use of alternatesegment registers. These segment registers include theES, FS, and GS registers.3.3.1.3 Instruction Pointer RegisterThe Instruction Pointer (EIP) Register contains the offsetinto the current code segment of the next instruction tobe executed. The register is normally incremented by thelength of the current instruction with each instruction executionunless it is implicitly modified through an interrupt,exception, or an instruction that changes the sequentialexecution flow (for example JMP and CALL).Table 3-3 illustrates the code segment selection rules.Geode GXLV Processor SeriesType of Memory ReferenceTable 3-3. Segment Register Selection RulesImplied (Default)SegmentSegment-OverridePrefixCode Fetch CS NoneDestination of PUSH, PUSHF, INT, CALL, PUSHA instructions SS NoneSource of POP, POPA, POPF, IRET, RET instructions SS NoneDestination of STOS, MOVS, REP STOS, REP MOVS instructions ES NoneOther data references with effective address using base registers of:EAX, EBX, ECX, EDX, ESI, EDI, EBP, ESPDSCS,ES,FS,GS,SSSSCS, DS, ES, FS, GSRevision 1.3 45 www.national.com
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Geode GXLV Processor Series Low Pow
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Geode GXLV Processor Series Low Power Integrated x86 Solutions

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