Geode GXLV Processor Series Low Power Integrated x86 Solutions

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Geode GXLV Processor SeriesElectrical Specifications (Continued)Table 6-15. System SignalsParameter Min Max Unit CommentsSetup Time for RESET, INTR 5 ns NoteHold Time for RESET, INTR 2 ns NoteSetup Time for SMI#, SUSP#, FLT# 5 nsHold Time for SMI#, SUSP#, FLT# 2 nsValid Delay for IRQ13, SUSPA# 2 15 nsValid Delay for SERIALP 2 15 nsNote: The system signals may be asynchronous. The setup/hold times are required for determining staticbehavior.www.national.com 200 Revision 1.3
Electrical Specifications (Continued)Table 6-16. PCI Interface Signals (Refer to Figures 6-7 and 6-8)Symbol Parameter Min Max Unit Commentst VAL1 Delay Time, SYSCLK to Signal Valid for Bused Signals 2 11 nst VAL2 Delay Time, SYSCLK to Signal Valid for GNT# 2 9 ns Notes 1, 2t ON Delay Time, Float to Active 2 nst OFF Delay Time, Active to Float 28 nst SU1 Input Setup Time for Bused Signals 7 nst SU2 Input Setup Time for REQ# 6 ns Notes 1, 2t H Input Hold Time to SYSCLK 0 nsGeode GXLV Processor SeriesNotes: 1.GNT# and REQ# are point-to-point signals. All other PCI interface signals are bused.Refer to Chapter 4 of PCI Local Bus Specification, Revision 2.1, for more detailed information.2. Maximum timings are improved over the PCI Local Bus Specification, Revision 2.1. This allows a PAL orsome other circuit to use a REQ/GNT pair to expand the number of REQ/GNT pairs available to the system(See application note, “GXLV Processor Series: Request/Grant Pair Expansion”.SYSCLKt VAL1,2OUTPUTTRI-STATE®OUTPUTt ONt OFFFigure 6-7. Output TimingSYSCLKt SU1,2t HINPUTFigure 6-8. Input TimingRevision 1.3 201 www.national.com
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Geode GXLV Processor Series Low Power Integrated x86 Solutions

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