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Geode GXLV Processor Series Low Power Integrated x86 Solutions

Geode GXLV Processor Series Low Power Integrated x86 Solutions

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<strong>Geode</strong> <strong>GXLV</strong> <strong>Processor</strong> <strong>Series</strong><strong>Integrated</strong> Functions (Continued)4.6.3 VGA Configuration RegistersSMI generation can be configured to trap VGA memoryaccesses in one of the following ranges:A0000h to AFFFFh (EGA,VGA),B0000h to B7FFFh (MDA),or B8000h to BFFFFh (CGA).Range selection is accomplished through programmablebits in the VGACTL register (Index B9h). Fine control canbe exercised within the range selected to allow off-screenaccesses to occur without generating SMIs.SMI generation can also separately control the followingI/O ranges: 3B0h to 3BFh, 3C0h to 3CFh, and 3D0h to3DFh. The BC_XMAP_1 register (GX_BASE+8004h) inthe Internal Bus Interface Unit has an enable/disable bitfor each of the address ranges above.The VGA control register (VGACTL) provides control forSMI generation through an enable bit for memory addressranges A0000h to BFFFFh. Each bit controls whether ornot SMI is generated for accesses to the correspondingaddress range. The default value of this register is zero sothat VGA accesses will not be trapped on systems with anexternal VGA card.The VGA Mask register (VGAM) has 32 bits that canselectively mask 2 KB regions within the VGA memoryregion A0000h to AFFFFh. If none of the three regions isenabled in VGACTL, then the contents of VGAM areignored.VGAMcanbeusedtopreventtheoccurrenceofSMI when non-displayed VGA memory is accessed. Thisis an enhancement that improves performance for doublebufferedapplications only.www.national.com 162 Revision 1.3

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