Geode GXLV Processor Series Low Power Integrated x86 Solutions

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Geode GXLV Processor SeriesInstruction Set (Continued)7.2.2 Extended CPUID LevelsTesting for extended CPUID instruction support can beaccomplished by executing a CPUID instruction with theEAX register initialized to 80000000h. If a value greaterthan or equal to 8000 0000h is returned to the EAX registerby the CPUID instruction, the processor supportsextended CPUID levels.7.2.2.1 CPUID Instruction with EAX = 80000000hExtended function 8000 0000h (EAX = 80000000h) of theCPUID instruction returns the maximum extended CPUIDlevels supported by the current processor in EAX (Table 7-21). The EBX, ECX, and EDX registers are currentlyreserved.Table 7-22. EAX, EBX, ECX CPUID DataReturned when EAX = 80000001hRegisterReturnedContentsDescriptionEAX[3:0] xx Stepping IDEAX[7:4] 4 ModelEAX[11:8] 5 FamilyEAX[15:12] 0 Processor TypeEAX[31:16] - ReservedEBX - ReservedECX - ReservedTable 7-21. Maximum Extended CPUID LevelRegisterReturnedContentsDescriptionEAX 80000005h Maximum Extended CPUIDLevel (six levels)EBX - ReservedECX - ReservedEDX - Reserved7.2.2.2 CPUID Instruction with EAX = 80000001hExtended function 80000001h (EAX = 80000001h) of theCPUID instruction returns the processor type, family,model, and stepping information of the current processorin EAX. The EBX and ECX registers are reserved.The extended feature flags supported are returned in theEDX register as shown in Table 7-23. Each flag refers to aspecific feature and indicates if that feature is present onthe processor. Some of these features have protectioncontrol in CR4. Before using any of these features on theprocessor, the software should check the correspondingfeature flag.Table 7-23. EDX CPUID Data Returnedwhen EAX = 80000001hEDXReturnedContents* Feature FlagCR4BitEDX[0] 1 FPU On-Chip -EDX[1] 0 Virtual Mode Extension -EDX[2] 0 Debugging Extension -EDX[3] 0 Page Size Extension -(4 MB)EDX[4] 1 Time Stamp Counter 2EDX[5] 1 Model-Specific Registers(via RDMSR / WRMSRInstructions)-EDX[6] 0 Reserved -EDX[7] 0 Machine Check Exception -EDX[8] 1 CMPXCHG8B Instruction -EDX[9] 0 Reserved -EDX[10] 0 Reserved -EDX[11] 0 SYSCALL / SYSRET -InstructionEDX[12] 0 Reserved -EDX[13] 0 Page Global Enable -EDX[14] 0 Reserved -EDX[15] 1 Integer Conditional Move -InstructionEDX[16] 0 FPU Conditional Move -InstructionEDX[22:17] 0 Reserved -EDX[23] 1 MMX -EDX[24] 1 6x86MX Multimedia-ExtensionsNote: 0 = Not supportedwww.national.com 214 Revision 1.3
Instruction Set (Continued)7.2.2.3 CPUID Instruction withEAX = 80000002h, 80000003h, 80000004hExtended functions 80000002h through 80000004h (EAX= 80000002h, EAX = 80000003h, EAX = 80000004h) ofthe CPUID instruction returns an ASCII string containingthe name of the current processor. These functions eliminatethe need to look up the processor name in a lookuptable. Software can simply call these functions to obtainthe name of the processor. The string may be 48 ASCIIcharacters long, and is returned in little endian format. Ifthe name is shorter than 48 characters long, the remainingbytes will be filled with ASCII NUL characters (00h).Table 7-24. Official CPU Name8000 0002h 8000 0003h 8000 0004hEAX CPUName 1EAX CPUName 5EAX CPUName 9EBXECXEDXCPUName 2CPUName 3CPUName 4EBXECXEDXCPUName 6CPUName 7CPUName 8EBXECXEDXCPUName 10CPUName 11CPUName 127.2.2.4 CPUID Instruction with EAX = 80000005hExtended function 80000005h (EAX = 80000005h) of theCPUID instruction returns information about the TLB andL1cachetobelookedupinalookuptable.RefertoTable7-25.Table 7-25. Standard CPUID withEAX = 80000005hRegisterReturnedContentsDescriptionEAX -- ReservedEBX xxxx70xxh TLBis32entry,4-waysetassociative, and has 4 KBPages.EBX xx xx xx 01h The CPUID instruction needsto be executed only once withan input value of 02h to retrievecomplete information about thecache and TLB.ECX xx xx xx 80h L1 cache is 16 KB, 4-way setassociated, and has 16 bytesper line.EDX -- ReservedGeode GXLV Processor SeriesRevision 1.3 215 www.national.com
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Architecture Overview (Continued)Ge
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2.0 Signal DefinitionsThis section
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Geode GXLV Processor Series Low Power Integrated x86 Solutions

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