Geode GXLV Processor Series Low Power Integrated x86 Solutions

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Geode GXLV Processor SeriesInstruction Set (Continued)CALL Subroutine CallInstructionDirect Within Segment E8 +++ - - - - - - - - - 3 3 b h,j,k,rRegister/Memory Indirect Within Segment FF [mod 010 r/m] 3/4 3/4Direct Intersegment-CallGatetoSamePrivilege-Call Gate to Different Privilege No Par’s-Call Gate to Different Privilege m Par’s-16-bit Task to 16-bit TSS-16-bit Task to 32-bit TSS-16-bit Task to V86 Task-32-bit Task to 16-bit TSS-32-bit Task to 32-bit TSS-32-bit Task to V86 TaskIndirect Intersegment-CallGatetoSamePrivilege-Call Gate to Different Privilege No Par’s-Call Gate to Different Privilege m Par’s-16-bit Task to 16-bit TSS-16-bit Task to 32-bit TSS-16-bit Task to V86 Task-32-bit Task to 16-bit TSS-32-bit Task to 32-bit TSS-32-bit Task to V86 TaskTable 7-27. Processor Core Instruction Set Summary (Continued)Opcode9A [unsigned full offset,selector]9 14244551+2m183189123186192126FF [mod 011 r/m] 11 15254652+2m184190124187193127CBW Convert Byte to Word 98 - - - - - - - - - 3 3CDQ Convert Doubleword to Quadword 99 - - - - - - - - - 2 2CLC Clear Carry Flag F8 - - - - - - - - 0 1 1CLD Clear Direction Flag FC - 0 - - - - - - - 4 4CLI Clear Interrupt Flag FA - - 0 - - - - - - 6 6 mCLTS Clear Task Switched Flag 0F 06 - - - - - - - - - 7 7 c lCMC Complement the Carry Flag F5 - - - - - - - - x 3 3CMOVA/CMOVNBE Move if Above/Not Below or EqualRegister, Register/Memory 0F 47 [mod reg r/m] - - - - - - - - - 1 1 rCMOVBE/CMOVNA Move if Below or Equal/Not AboveRegister, Register/Memory 0F 46 [mod reg r/m] - - - - - - - - - 1 1 rCMOVAE/CMOVNB/CMOVNC Move if Above or Equal/Not Below/Not CarryRegister, Register/Memory 0F 43 [mod reg r/m] - - - - - - - - - 1 1 rCMOVB/CMOVC/CMOVNAE Move if Below/Carry/Not Above or EqualRegister, Register/Memory 0F 42 [mod reg r/m] - - - - - - - - - 1 1 rCMOVE/CMOVZ Move if Equal/ZeroRegister, Register/Memory 0F 44 [mod reg r/m] - - - - - - - - - 1 1 rCMOVNE/CMOVNZ Move if Not Equal/Not ZeroRegister, Register/Memory 0F 45 [mod reg r/m] - - - - - - - - - 1 1 rCMOVG/CMOVNLE Move if Greater/Not Less or EqualRegister, Register/Memory 0F 4F [mod reg r/m] - - - - - - - - - 1 1 rCMOVLE/CMOVNG Move if Less or Equal/Not GreaterRegister, Register/Memory 0F 4E [mod reg r/m] - - - - - - - - - 1 1 rCMOVL/CMOVNGE Move if Less/Not Greater or EqualRegister, Register/Memory 0F 4C [mod reg r/m] - - - - - - - - - 1 1 rCMOVGE/CMOVNL Move if Greater or Equal/Not LessRegister, Register/Memory 0F 4D [mod reg r/m] - - - - - - - - - 1 1 rCMOVO Move if OverflowRegister, Register/Memory 0F 40 [mod reg r/m] - - - - - - - - - 1 1 rCMOVNO Move if No OverflowRegister, Register/Memory 0F 41 [mod reg r/m] - - - - - - - - - 1 1 rCMOVP/CMOVPE Move if Parity/Parity EvenRegister, Register/Memory 0F 4A [mod reg r/m] - - - - - - - - - 1 1 rCMOVNP/CMOVPO Move if Not Parity/Parity OddRegister, Register/Memory 0F 4B [mod reg r/m] - - - - - - - - - 1 1 rFlagsO D I T S Z A P CF F F F F F F F FRealModeProt’dModeClock Count(Reg/Cache Hit)RealModeProt’dModeIssueswww.national.com 218 Revision 1.3
Instruction Set (Continued)InstructionCMOVS Move if SignRegister, Register/Memory 0F 48 [mod reg r/m] - - - - - - - - - 1 1 rCMOVNS Move if Not SignRegister, Register/Memory 0F 49 [mod reg r/m] - - - - - - - - - 1 1 rCMP Compare IntegersRegister to Register 3 [10dw] [11 reg r/m] x - - - x x x x x 1 1 b hRegister to Memory 3 [101w] [mod reg r/m] 1 1Memory to Register 3 [100w] [mod reg r/m] 1 1Immediate to Register/Memory 8 [00sw] [mod 111 r/m] ### 1 1Immediate to Accumulator 3 [110w] ### 1 1CMPS Compare String A [011w] x - - - x x x x x 6 6 b hCMPXCHG Compare and ExchangeRegister1, Register2 0F B [000w] [11 reg2 reg1] x - - - x x x x x 6 6Memory, Register 0F B [000w] [mod reg r/m] 6 6CMPXCHG8B Compare and Exchange 8 Bytes 0F C7 [mod 001 r/m] - - - - - - - - -CPUID CPU Identification 0F A2 - - - - - - - - - 12 12CPU_READ Read Special CPU Register 0F 3C 1 1CPU_WRITE Write Special CPU Register 0F 3D 1 1CWD Convert Word to Doubleword 99 - - - - - - - - - 2 2CWDE Convert Word to Doubleword Extended 98 - - - - - - - - - 3 3DAA Decimal Adjust AL after Add 27 - - - - x x x x x 2 2DAS Decimal Adjust AL after Subtract 2F - - - - x x x x x 2 2DEC Decrement by 1Register/Memory F [111w] [mod 001 r/m] x - - - x x x x - 1 1 b hRegister (short form) 4 [1 reg] 1 1DIV Unsigned DivideAccumulator by Register/MemoryF [011w] [mod 110 r/m] - - - - x x u u -b,e e,hDivisor: ByteWordDoubleword202945202945ENTER Enter New Stack FrameLevel = 0 C8 ##,# - - - - - - - - - 13 13 b hLevel = 1 17 17Level (L) > 1 17+2*L 17+2*LHLT Halt F4 - - - - - - - - - 10 10 lIDIV Integer (Signed) DivideAccumulator by Register/MemoryF [011w] [mod 111 r/m] - - - - x x u u -b,e e,hDivisor: ByteWordDoubleword202945202945IMUL Integer (Signed) MultiplyAccumulator by Register/MemoryMultiplier: ByteWordDoublewordTable 7-27. Processor Core Instruction Set Summary (Continued)OpcodeF [011w] [mod 101 r/m] x - - - x x u u xRegister with Register/Memory0F AF [mod reg r/m]Multiplier: WordDoubleword515515Register/Memory with Immediate to Register2 6 [10s1] [mod reg r/m] ###Multiplier: WordDoubleword616616IN Input from I/O PortFixed Port E [010w] # - - - - - - - - - 8 8/22 mVariable Port E [110w] 8 8/22INS Input String from I/O Port 6 [110w] - - - - - - - - - 11 11/25 b h,mFlagsO D I T S Z A P CF F F F F F F F FRealMode4515Prot’dModeClock Count(Reg/Cache Hit)4515RealModebProt’dModeIssueshGeode GXLV Processor SeriesRevision 1.3 219 www.national.com
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Geode GXLV Processor SeriesTable of
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Geode GXLV Processor SeriesArchitec
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Architecture Overview (Continued)Ge
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Architecture Overview (Continued)SD
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2.0 Signal DefinitionsThis section
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Signal Definitions (Continued)Index
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Signal Definitions (Continued)PinNo
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Signal Definitions (Continued)Table
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Signal Definitions (Continued)PinNo
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Signal Definitions (Continued)Table
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Signal Definitions (Continued)2.2 S
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3.0 Processor ProgrammingThis secti
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