Geode GXLV Processor Series Low Power Integrated x86 Solutions

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Geode GXLV Processor SeriesIntegrated Functions (Continued)4.5.11 Cursor Position and Miscellaneous RegistersThe Cursor Position Registers contain pixel coordinateinformation for the cursor. These values are not latched bythe timing generator until the start of the frame to avoidtearing artifacts when moving the cursor.Bit Name DescriptionThe Cursor Position group consists of two 32-bit registerslocated at GX_BASE+8350h and GX_BASE+8358h.These registers are summarized in Table 4-28 on page141, and Table 4-32 gives their bit formats.Table 4-32. Display Controller Cursor Position RegistersGX_BASE+8350h-8353h DC_CURSOR_X Register (R/W) Default Value = xxxxxxxxh31:16 RSVD Reserved: Set to 0.15:11 X_OFFSET X Offset: The X pixel offset within the 32x32 cursor pattern at which the displayed portion of the cursoris to begin. Normally, this value is set to zero to display the entire cursor pattern, but for cursors forwhich the "hot spot" is not at the left edge of the pattern, it may be necessary to display the rightmostpixels of the cursor only as the cursor moves close to the left edge of the display.10:0 CURSOR_X Cursor X: The X coordinate of the pixel at which the upper left corner of the cursor is to be displayed.This value is referenced to the screen origin (0,0) which is the pixel in the upper left corner of thescreen.GX_BASE+8354h-8357h DC_V_LINE_CNT Register (RO) Default Value = xxxxxxxxh31:11 RSVD Reserved (Read Only)10:0 V_LINE_CNT Vertical Line Count (Read Only): This value is the current scanline of the display.(RO)Note: The value in this register is driven directly off of the DCLK, and is not synchronized with the CPU clock. Software should readthis register twice and compare the two results to ensure that the value is not in transition.GX_BASE+8358h-835Bh DC_CURSOR_Y Register (R/W) Default Value = xxxxxxxxh31:16 RSVD Reserved: Set to 0.15:11 Y_OFFSET Y Offset: The Y line offset within the 32x32 cursor pattern at which the displayed portion of the cursoris to begin. Normally, this value is set to zero to display the entire cursor pattern, but for cursors forwhich the "hot spot" is not at the top edge of the pattern, it may be necessary to display the bottommostlines of the cursor only as the cursor moves close to the top edge of the display. If this value is nonzero,the CUR_START_OFFSET must be set to point to the first cursor line to be displayed.10 RSVD Reserved: Set to 0.9:0 CURSOR_Y Cursor Y: The Y coordinate of the line at which the upper left corner of the cursor is to be displayed.This value is referenced to the screen origin (0,0) which is the pixel in the upper left corner of thescreen.This field is alternately used as the line-compare value for a newly-programmed frame buffer start offset.This is necessary for VGA programs that change the start offset in the middle of a frame. In orderto use this function, the hardware cursor function should be disabled.GX_BASE+835Ch-835Fh DC_SS_LINE_CMP Register (R/W) Default Value = xxxxxxxxh31:11 RSVD Reserved: Set to 0.10:0 SS_LINE_CMP Split-Screen Line Compare: This is the line count at which the lower screen begins in a VGA splitscreenmode.Note: When the internal line counter hits this value, the frame buffer address is reset to 0. This function is enabled with the SSLC bitin the DC_GENERAL_CFG register (see Table 4-29).www.national.com 152 Revision 1.3
Integrated Functions (Continued)4.5.12 Palette Access RegistersThese registers are used for accessing the internal paletteRAM and extensions. In addition to the standard 256entries for 8-bpp color translation, the GXLV processorpalette has extensions for cursor colors and overscan(border) color.Bit Name DescriptionTable 4-33. Display Controller PaletteThe Palette Access Register group consists of two 32-bitregisters located at GX_BASE+8370h andGX_BASE+8374h. These registers are summarized inTable 4-28 on page 141, and Table 4-33 gives their bit formats.GX_BASE+8370h-8373h DC_PAL_ADDRESS Register (R/W) Default Value = xxxxxxxxh31:9 RSVD Reserved: Set to 0.8:0 PALETTE_ADDR Palette Address: The address to be used for the next access to the DC_PAL_DATA register. Eachaccess to the data register will automatically increment the palette address register. If non-sequentialaccess is made to the palette, the address register must be loaded between each non-sequentialdata block. The address ranges are as follows.AddressColor0h - FFhStandard Palette Colors100h Cursor Color 0101h Cursor Color 1102hReserved103hReserved104hOverscan (Color Border)105h - 1FFh Not ValidGX_BASE+8374h-8377h DC_PAL_DATA Register (R/W) Default Value = xxxxxxxxh31:18 RSVD Reserved: Set to 0.17:0 PALETTE_DATA Palette Data: The read or write data for a palette access.Note: When a read or write to the palette RAM occurs, the previous output value will be held for one additional DCLK period. Thiseffect should go unnoticed and will provide for sparkle-free update. Prior to a read or write to this register, theDC_PAL_ADDRESS register should be loaded with the appropriate address. The address automatically increments after eachaccess to this register, so for sequential access, the address register need only be loaded onceGeode GXLV Processor SeriesRevision 1.3 153 www.national.com
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Geode GXLV Processor Series Low Pow
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Geode GXLV Processor Series Low Power Integrated x86 Solutions

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