Geode GXLV Processor Series Low Power Integrated x86 Solutions

Geode GXLV Processor SeriesInstruction Set (Continued)7.1.1 Prefix (Optional)Prefix bytes can be placed in front of any instruction tomodify the operation of that instruction. When more thanone prefix is used, the order is not important. There arefive types of prefixes that can be used:1. Segment Override explicitly specifies which segmentregister the instruction will use for effective addresscalculation.2. Address Size switches between 16-bit and 32-bitaddressing by selecting the non-default address size.3. Operand Size switches between 16-bit and 32-bitoperand size by selecting the non-default operandsize.4. Repeat is used with a string instruction to cause theinstruction to be repeated for each element of thestring.5. Lock is used to assert the hardware LOCK# signalduring execution of the instruction.Table 7-3 lists the encoding for different types of prefixbytes.Table 7-3. Instruction Prefix SummaryPrefix Encoding DescriptionES: 26h Override segment default, use ESfor memory operand.CS: 2Eh Override segment default, use CSfor memory operand.SS: 36h Override segment default, use SSfor memory operand.DS: 3Eh Override segment default, use DSfor memory operand.FS: 64h Override segment default, use FSfor memory operand.GS: 65h Override segment default, use GSfor memory operand.OperandSizeAddressSize66h67hMake operand size attribute theinverse of the default.Make address size attribute theinverse of the default.LOCK F0h Assert LOCK# hardware signal.REPNE F2h Repeat the following stringinstruction.REP/REPE F3h Repeat the following stringinstruction.7.1.2 OpcodeThe opcode field specifies the operation to be performedby the instruction. The opcode field is either one or twobytes in length and may be further defined by additionalbits in the mod r/m byte. Some operations have more thanone opcode, each specifying a different form of the operation.Certain opcodes name instruction groups. For example,opcode 80h names a group of operations that havean immediate operand and a register or memory operand.The reg field may appear in the second opcode byte or inthe mod r/m byte.The opcode may contain w, d, s and eee opcode fields, forexample, as shown in Table 7-27 on page 217.7.1.2.1 w Field (Operand Size)When used, the 1-bit w field selects the operand size during16-bit and 32-bit data operations. See Table 7-4.wFieldTable 7-4. w Field Encoding16-Bit DataOperationsOperand Size32-Bit DataOperations0 8 bits 8 bits1 16bits 32bits7.1.2.2 d Field (Operand Direction)When used, the 1-bit d field determines which operand istaken as the source operand and which operand is takenas the destination. See Table 7-5.dFieldTable 7-5. d Field EncodingDirection ofOperation0 Register-to-RegisterorRegister-to-Memory1 Register-to-RegisterorMemory-to-RegisterSourceOperandregmod r/mormod ss-indexbaseDestinationOperandmod r/mormod ss-indexbaseregwww.national.com 208 Revision 1.3