Geode GXLV Processor Series Low Power Integrated x86 Solutions

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Geode GXLV Processor SeriesProcessor Programming (Continued)3.6.5 Exceptions in Real ModeMany of the exceptions described in Table 3-29 "InterruptVector Assignments" on page 80 are not applicable in realmode. Exceptions 10, 11, and 14 do not occur in realmode. Other exceptions have slightly different meaningsin real mode as listed in Table 3-31.Table 3-31. Exception Changes in Real ModeVectorNumberProtected ModeFunctionReal ModeFunction8 Double fault. Interrupt table limit overrun.10 Invalid TSS. Does not occur.11 Segment not Does not occur.present.12 Stack fault. SS segment limit overrun.13 General protectionfault.CS,DS,ES,FS,GSsegmentlimit overrun. In protectedmode, an error code ispushed. In real mode, noerror code is pushed.14 Page fault. Does not occur.3.6.6 Error CodesWhen operating in protected mode, the following exceptionsgenerate a 16-bit error code:• Double Fault• Alignment Check• Invalid TSS• Segment Not Present• Stack Fault• General Protection Fault• Page FaultThe error code format and bit definitions are shown inTable 3-32. Bits [15:3] (selector index) are not meaningfulif the error code was generated as the result of a pagefault. The error code is always zero for double faults andalignment check exceptions.Table 3-32. Error Codes15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0Selector Index S2 S1 S0Table 3-33. Error Code Bit DefinitionsFaultTypeSelector Index(Bits 15:3) S2 (Bit 2) S1 (Bit 1) S0 (Bit 0)PageFaultIDT FaultSegmentFaultReserved.Index of faulty IDTselector.Index of faultyselector.Fault caused by:0 = Not present page1 = Page-level protectionviolationFault occurred during:0 = Read access1=WriteaccessFault occurred during0 = Supervisor access1 = User access.Reserved 1 If = 1, exception occurred whiletrying to invoke exception orhardware interrupt handler.TI bit of faulty selector 0 If =1, exception occurred whiletrying to invoke exception orhardware interrupt handler.www.national.com 82 Revision 1.3
Processor Programming (Continued)3.7 SYSTEM MANAGEMENT MODESystem Management Mode (SMM) is an enhancement ofthe standard x86 architecture. SMM is usually employedfor system power management or software-transparentemulation of I/O peripherals. SMM is entered through ahardware signal “System Management Interrupt” (SMI#pin) that has a higher priority than any other interrupt,including NMI. An SMM interrupt can also be triggeredfrom software using an SMINT instruction. Following anSMM interrupt, portions of the CPU state are automaticallysaved, SMM is entered, and program executionbegins at the base of SMM address space (Figure 3-9).FFFFFFFFhPhysicalMemory SpaceThe GXLV processor extends System Management Modeto support the virtualization of many devices, includingVGA video. The SMM mechanism can be triggered notonly by I/O activity, but by access to selected memoryregions. For example, SMM interrupts are generatedwhen VGA addresses are accessed. As will be described,other SMM enhancements have reduced SMM overheadand improved virtualization-software performanceFFFFFFFFhPotentialSMM AddressSpaceGeode GXLV Processor SeriesPhysical Memory4GB4KBto32MBDefinedSMMAddressSpace00000000hNon-SMM00000000hSMMFigure 3-9. System Management Memory Address SpaceRevision 1.3 83 www.national.com
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Geode GXLV Processor Series Low Pow
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