Geode GXLV Processor Series Low Power Integrated x86 Solutions

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Geode GXLV Processor SeriesIntegrated Functions (Continued)820Ch-820Fh R/W GP_BLT_STATUSGraphics Pipeline BLT Status Register: Contains configuration and status informationfor the BLT engine. The status bits are contained in the lower byte of theregister.8210h-8213h(Note)8214h-8217h(Note)Table 4-23. Graphics Pipeline Configuration Register Summary (Continued)GX_BASE+Memory Offset Type Name / Function Default ValueR/WR/WGP_VGA_BASEGraphics Pipeline VGA Memory Base Address Register: Specifies the offset ofthe VGA memory, starting from the base of graphics memory.GP_VGA_LATCHGraphics Pipeline VGA Display Latch Register: Provides a memory mapped wayto read or write the VGA display latch.00000000hxxxxxxxxhxxxxxxxxhNote: The registers at GX_BASE+8140, 8144h, 8210h, and 8214h are located in the area designated for the graphics pipeline butare used for VGA emulation purposes. Refer to Table 4-39 on page 165 for these register’s bit formats.Bit Name DescriptionTable 4-24. Graphics Pipeline Configuration RegistersGX_BASE+8100h-8103h GP_DST/START_X/YCOOR Register (R/W) Default Value = 00000000h31:16 DESTINATION/STARTING Y POSITION (SIGNED):BLT Mode: Specifies the destination Y position for a BLT operation.Vector Mode: Specifies the starting Y position in a vector.15:0 DESTINATION/STARTING X POSITION (SIGNED):BLT Mode: Specifies the destination X position for a BLT operation.Vector Mode: Specifies the starting X position in a vector.GX_BASE+8104h-8107h GP_WIDTH/HEIGHT and Default Value = 00000000hGP_VECTOR_LENGTH/INIT_ERROR Register (R/W)31:16 PIXEL_WIDTH or VECTOR_LENGTH (UNSIGNED):BLT Mode: Specifies the width, in pixels, of a BLT operation. No pixels are rendered for a width of zero.Vector Mode: Bits [31:30] are reserved in this mode allowing this 14-bit field to specify the length, in pixels, of a vector. Nopixels are rendered for a length of zero. This field is limited to 14 bits due to a lack of precision in the registers used to holdthe error terms.15:0 PIXEL_HEIGHT or VECTOR_INITIAL_ERROR (UNSIGNED):BLT Mode: Specifies the height, in pixels, of a BLT operation. No pixels are rendered for a height of zero.Vector Mode: Specifies the initial error for rendering a vector.GX_BASE+8108h-810Bh GP_SCR_X/YCOOR and GP_AXIAL/DIAG_ERROR Register (R/W) Default Value = 00000000h31:16 SRC_X_POS or VECTOR_AXIAL_ERROR (SIGNED):BLT Mode: Specifies the source X position for a BLT operation.Vector Mode: Specifies the axial error for rendering a vector.15:0 SRC_Y_POS or VECTOR_DIAG_ERROR (SIGNED):Source Y Position (Signed): Specifies the source Y position for a BLT operation.Vector Mode: Specifies the diagonal error for rendering a vector.GX_BASE+810Ch-810Dh GP_SRC_COLOR_0 Register (R/W) Default Value = 0000h15:0 8-bpp Mode: 8-bpp color: The color index must be duplicated in the upper byte.16-bpp Mode: 16-bpp color (RGB)GX_BASE+810Eh-810Fh GP_SRC_COLOR_1 Register (R/W) Default Value = 0000h15:0 8-bpp Mode: 8-bpp color: The color index must be duplicated in the upper byte.16-bpp Mode: 16-bpp color (RGB)Note: The Graphics Pipeline Source Color Register specifies the colors used when expanding monochrome source data in either the8-bpp mode or the 16-bpp mode. Those pixels corresponding to clear bits (0) in the source data are rendered usingGP_SRC_COLOR_0 and those pixels corresponding to set bits (1) in the source data are rendered usingGP_SRC_COLOR_1.www.national.com 130 Revision 1.3
Integrated Functions (Continued)Bit Name DescriptionTable 4-24. Graphics Pipeline Configuration Registers (Continued)GX_BASE+8110h-8111h GP_PAT_COLOR_0 Register (R/W) Default Value = 0000h15:0 8-bpp Mode: 8-bpp color: The color index must be duplicated in the upper byte.16-bpp Mode: 16-bpp color (RGB)Note: The Graphics Pipeline Pattern Color 0-3 Registers specify the colors used when expanding pattern data.GX_BASE+8112h-8113h GP_PAT_COLOR_1 Register (R/W) Default Value = 0000h15:0 8-bpp Mode: 8-bpp color: The color index must be duplicated in the upper byte.16-bpp Mode: 16-bpp color (RGB)Note: The Graphics Pipeline Pattern Color 0-3 Registers specify the colors used when expanding pattern data.GX_BASE+8114h-8115h GP_PAT_COLOR_2 Register (R/W) Default Value = 0000hGeode GXLV Processor Series15:0 8-bpp Mode: 8-bpp color: The color index must be duplicated in the upper byte.16-bpp Mode: 16-bpp color (RGB)Note: The Graphics Pipeline Pattern Color 0-3 Registers specify the colors used when expanding pattern data.GX_BASE+8116h-8117h GP_PAT_COLOR_3 Register (R/W) Default Value = 0000h15:0 8-bpp Mode: 8-bpp color: The color index must be duplicated in the upper byte.16-bpp Mode: 16-bpp color (RGB)Note: The Graphics Pipeline Pattern Color 0-3 Registers specify the colors used when expanding pattern data.GX_BASE+8120h-8123h GP_PAT_DATA_0 Register (R/W) Default Value = 00000000h31:0 GP Pattern Data Register 0: The Graphics Pipeline Pattern Data Registers 0 through 3 together contain 128 bits of patterndata. The GP_PAT_DATA_0 register corresponds to bits [31:0] of the pattern data.GX_BASE+8124h-8127h GP_PAT_DATA_1 Register (R/W) Default Value = 00000000h31:0 GP Pattern Data Register 1: The Graphics Pipeline Pattern Data Registers 0 through 3 together contain 128 bits of patterndata. The GP_PAT_DATA_1 register corresponds to bits [63:32] of the pattern data.GX_BASE+8128h-812Bh GP_PAT_DATA_2 Register (R/W) Default Value = 00000000h31:0 GP Pattern Data Register 2: The Graphics Pipeline Pattern Data Registers 0 through 3 together contain 128 bits of patterndata. The GP_PAT_DATA_2 register corresponds to bits [95:64] of the pattern data.GX_BASE+812Ch-812Fh GP_PAT_DATA_3 Register (R/W) Default Value = 00000000h31:0 GP Pattern Data Register 3: The Graphics Pipeline Pattern Data Registers 0 through 3 together contain 128 bits of patterndata. The GP_PAT_DATA_3 register corresponds to bits [127:96] of the pattern data.GX_BASE+8140h-8143h GP_VGA_WRITE Register (R/W) Default Value = xxxxxxxxhNote that the register at GX_BASE+82140h is located in the area designated for the graphics pipeline but is used for VGA emulationpurposes. Refer to Table 4-39 on page 165 for this register’s bit formats.GX_BASE+8144h-8147h GP_VGA_READ Register (R/W) Default Value = 00000000hNote that the register at GX_BASE+8144h is located in the area designated for the graphics pipeline but is used for VGA emulationpurposes. Refer to Table 4-39 on page 165 for this register’s bit formats.GX_BASE+8200h-8203h GP_RASTER_MODE Register (R/W) Default Value = 00000000h31:13 RSVD Reserved: Set to 0.12 TB Transparent BLT: When set, this bit enables transparent BLT. The source color data will be compared to acolor key and if it matches, that pixel will not be drawn. The color key value is stored in the BLT buffer as destinationdata. The raster operation must be set to C6h, and the pattern registers must be all F’s for this modeto work properly.11 ST Source Transparency: Enables transparency for monochrome source data. Those pixels corresponding toclear bits in the source data are not drawn.10 PT Pattern Transparency: Enables transparency for monochrome pattern data. Those pixels corresponding toclear bits in the pattern data are not drawn.Revision 1.3 131 www.national.com
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Geode GXLV Processor Series Low Pow
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