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wilamowski-b-m-irwin-j-d-industrial-communication-systems-2011

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18-8 Industrial Communication Systems<br />

18.10 architecture, Protocol, and Algorithms<br />

The idea behind the NTP is to distribute a common notion of time among all nodes of a network in<br />

terms of a reference clock. This goal can be achieved in quite different strategies:<br />

• Minimization of clock offset, which tries to minimize the sampled difference between the local<br />

and the reference time.<br />

• Alignment of the frequency. This is equal to the first strategy, with the exception that the absolute offset<br />

of periodically generated clock signals is not considered, but the stability of the offset optimized.<br />

• The alignment of the absolute clock value in terms of minimizing clock offset and optimizing the<br />

difference between all nodes. This criterion is equal to internal clock synchronization (alignment<br />

of all nodes of a network with no respect to the absolute time scale), with the exception that NTP<br />

inherently assumes an alignment to an absolute correct time source of the overall master.<br />

18.11 NTP Clock Synchronization Hardware Requirements<br />

Like any other clock synchronization system, NTP has to make certain assumptions regarding the clocks.<br />

As NTP aims to synchronize hosts within the Internet, one assumption is that the architecture of every<br />

node is similar to a clock in a PC. One further assumption of NTP is that a network node does not necessarily<br />

need to be powered up all time. However, this requires keeping up with the unstoppable progress of<br />

time even during power down. In practice, this is usually done with a so-called real-time clock (RTC). This<br />

clock is battery-powered and thus, running also during power-down times. For cost and energy efficiency<br />

reasons, these clocks are usually equipped with 32,768.kHz crystals. This frequency is very convenient,<br />

since 32,768 transitions can be represented as 2 15 , which means that a 15 bit counter can be used without<br />

further fractional parts to represent 1.s. In common PC architectures, the content of this clock is loaded<br />

during boot-up into a tick register. Usual clock registers for NTP are 48 bit wide, and updated by adding<br />

the 32 bit wide clock-adjust register, with an interrupt typically scheduled every 1–20.ms. The content is<br />

also called processor cycle counter (PCC). As these registers are updated by means of software routines<br />

and without the possibility to schedule future updates (such as provided in high precision clocks like in<br />

SynUTC), writing to these registers has to be done with high priority [Mills1998a]. Additionally, the 16 bit<br />

wide drift-compensation register is used to compensate the frequency offset of the processor clock.<br />

18.12 Synchronization Algorithms of NTP<br />

Figure 18.6 shows the five components of the NTP:<br />

• The data filter is instantiated on the client side for every server. The main task of this unit is to<br />

calculate the delay through round-trip measurements and adjust the contents of each message<br />

accordingly.<br />

Network Data filter Peer selection Clock combining Loop filter Adjustable<br />

clock<br />

Data filter<br />

Data filter<br />

FIGURE 18.6<br />

System concept of a typical NTP node (NTPSystemConcept.pdf).<br />

© <strong>2011</strong> by Taylor and Francis Group, LLC

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