wilamowski-b-m-irwin-j-d-industrial-communication-systems-2011

43-10 Industrial Communication Systems
Configuration and Planning Interface
During the integration phase, the configuration and planning (CP) interface is used to generate the
“glue” between the nearly autonomous components, that is, the time-triggered schedule and communication
endpoints. The CP interface is not time-critical.
43.6.3 Principles of Operation
TTP/A is a TTP supporting two types of communication: (1) master–slave communication between
an active master and a selected transducer node and (2) multipartner communication among several
smart transducer nodes. The master is required for both communication modes in order to establish a
common time base among the nodes. In case of a crash failure of the master, a shadow master can take
control. Every node in this cluster has a unique alias, an 8 bit (1 byte) integer, which can be assigned to
the node a priori or set via the configuration interface.
The bus allocation is done by a TDMA scheme. Communication is organized into rounds consisting
of several TDMA slots. A slot is the unit for transmission of one byte of data. Data bytes are transmitted
in a standard UART format. Each communication round is started by the master with a so-called
fireworks byte. The fireworks byte defines the type (e.g., multipartner or master–slave) of the round and
is a reference signal for clock synchronization. Followed by the fireworks byte are a number of data
bytes. The communication pattern for each round is predefined via the RODL, which is distributively
stored in all nodes.
There are eight different firework bytes encoded by a redundant bit code supporting error detection.
One fireworks byte is a regular bit pattern, which is also used by slave nodes with an imprecise on-chip
oscillator for startup synchronization (see Figure 43.9). Between 2 data bytes, there is an extra Inter-Byte
Gap (IBG) in order to account for a switching time between different senders. The IRG defines a time of
silence between two consecutive rounds.
UART−Frame 11−bit
IRG
0 1 2 3 4 5 6 7
Odd
IBG
Start
LSB
Synchronize pattern
MSB
Partity
Stop
TTP/A Slot−13 bit
FIGURE 43.9
Synchronization pattern.
Multipartner round
Slot 0
Slot 1 Slot 2
Slot n
Slot 0
FB (Master)
DataByte
DataByte DataByte FB (Master)
FB.................. Fireworks Byte, sent by master
DataByte...... sent either by master or slave
Last slot of round
t
FIGURE 43.10
Example for a TTP/A multipartner round.
© 2011 by Taylor and Francis Group, LLC