wilamowski-b-m-irwin-j-d-industrial-communication-systems-2011

2-6 Industrial Communication Systems
+V
+V
0
0
–V
–V ‘1’ bit ‘0’ bit
‘1’ bit ‘0’ bit
+V
0
–V
FIGURE 2.7
+V
0
–V
1 0 1 1 0
1 0 1 1 0
Manchester encoding.
Principally at the receiver, the series of bits has to be recovered by means of a clock signal. This timing
signal is needed to identify the boundaries between the bits; respectively, the centre of the bit has to be
detected indicating the bit value with maximum signal power. Two methods are used providing timing:
• Asynchronous communications with independent transmit and receive clock: A simple method
where transmit and receive clock are independently set to the same clock rate. Bit synchronization
within a single byte is attained by a start bit providing the timing for detecting the data
bits (Figure 2.8). Synchronization ends with a stop bit. The data rate is limited mainly caused by
increasing synchronization loss, e.g., because of noise disturbing the start bit. A parity bit is often
employed to validate correct reception. This type of communication is primarily used for connecting
printer, terminal, and modem.
• Synchronous communication using synchronized transmit and receive clocks: This more complex
method supports also high data rates (~Gbps). Timing is derived from edges in the bit stream
that are used to synchronize the receive clock. Mostly, cyclic redundancy check is used to validate
correct reception.
• A lot of additional coding and modulation techniques are used, which are only mentioned shortly.
• Digital frequency modulation (FM) and modified frequency modulation (MFM) related to
Manchester coding and primarily used for magnetic recording.
• Differential Manchester encoding, where an additional transition at the beginning of the bit time
is only included when coding a zero bit.
• Non–return to zero invert (NRZ-I), where the coding signal level depends on the previous one.
With that, frequent level changes allow better synchronizing.
• Block codes 4B/5B, 5B/6B, and 8B/10B use a greater number of bits (5, 6, or 10 instead of 4, 5, or 8)
for coding the bit group with the goal of using code combination for reliable clock synchronization.
5B/6B and 8B/10B additionally allow DC balance.
• Block code 8B/6T uses ternary coding (three voltage levels −V, 0, +V).
• Pulse amplitude modulation 5 (PAM-5) uses five voltage levels (e.g., −2, −1, 0, 1, 2.V) where one
level (0.V) is used for trellis error correction. PAM-5 is utilized by Ethernet 100BASE-T2 over
two wire pairs and 1000BASE-T over four wire pairs. One type of 10.Gbps Ethernet over wire
(Standard IEEE 802.3an) makes use of a pulse-amplitude modulation with 16 discrete levels
(PAM-16) over UTP or STP cable.
0 1 2
3 4 5 6 7 P
Idle
Start
Data bits
Stop
FIGURE 2.8 Asynchronous communication: example with 8 data bits (0–7), a parity bit P and a single stop bit
with length of 1 data bit.
© 2011 by Taylor and Francis Group, LLC