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wilamowski-b-m-irwin-j-d-industrial-communication-systems-2011

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SafetyLon 47-5<br />

In detail, a hardware fault tolerance of 1 results in a required safe failure fraction of 90%–99%. The<br />

safe failure fraction (SFF) defines the percentage of failures that do not result in a dangerous situation.<br />

It is defined as follows:<br />

λSD + λSU + λDD<br />

SFF =<br />

λ + λ + λ + λ<br />

SD SU DD DU<br />

(47.1)<br />

where<br />

λ SD is the safe detected failure<br />

λ SU is the safe undetected failure<br />

λ DD is the dangerous detected failure<br />

λ DU is the dangerous undetected failure<br />

Hence, there must be a trade-off between the quality of the hardware to reduce the inherent risk and the<br />

effort performed to detect dangerous failures. As defined in the formula, λ DU reduces the SFF, whereas<br />

dangerous failures that can lead into a hazardous state can be used to increase the SFF if they are detected.<br />

Hence, it is reasonable to perform hardware self tests (i.e., detecting dangerous faults that therefore result<br />

in non-dangerous failures) in order to increase the SFF. The impacts of the above described facts result in<br />

extensive testing of all components such as input and output, or volatile and nonvolatile memory [8]. In the<br />

following, an example is given on how to design and test the safe input and output logic.<br />

In a standard, non-safe environment a digital input is simply connected to the evaluating device.<br />

Connecting a digital IO directly to a microcontroller is often not suitable for safety-related devices. First,<br />

the hardware inside the device must be protected against hazardous effects from outside, therefore mostly<br />

a galvanic isolation, an optocoupler, is used. Second, additional components are added to setup a testable<br />

input. The input is tested only if it is active, which means that a defined voltage is applied to the input terminal.<br />

It is not necessary to test an input that is in an inactive state because it is per definition the safe state.<br />

Figure 47.3 depicts the principles of a testable input; several elements were omitted in the picture in<br />

order to focus on the functionality. In addition to the first optocoupler, a second one is added. For testing<br />

purpose, this device is able to switch off the signal transmission to the microcontrollers for a very<br />

short period of time. This interruption of the input signal must be detected by the microcontroller.<br />

Field side Safe input internals<br />

Opto coupler 1<br />

Internal<br />

power<br />

supply<br />

Field input<br />

signal<br />

Ground<br />

extern<br />

Input to<br />

CPU<br />

Test input<br />

from<br />

CPU<br />

Opto coupler 2<br />

Ground<br />

intern<br />

FIGURE 47.3<br />

Schematic of safety-related input.<br />

© <strong>2011</strong> by Taylor and Francis Group, LLC

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