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INTERBUS 33-5<br />

interface shutdown. The identification cycle is also used to find the cause of a transmission error and to<br />

check the integrity of the SR ring.<br />

The individual registers are switched in the different phases of the INTERBUS protocol via the selector<br />

in the ring.<br />

On layer 1, INTERBUS uses two telegram formats with start and stop bits:<br />

• The 5 bit status telegram<br />

• The 13 bit data telegram<br />

The status telegram is used to synchronize the activities on the medium during pauses in data transmission.<br />

The slave nodes use the status telegram to reset their internal watchdogs, which are used to<br />

control a failsafe state. The data telegram is used to carry a byte of the layer 2 payload. The remaining<br />

bits of both telegrams are used to distinguish between data and identification cycles, as well as<br />

the data transfer and FCS phases within a cycle. This information is used by the selector shown in<br />

Figure 33.4 to switch the relevant register in the ring. INTERBUS uses a physical transmission speed<br />

of 500.kbps or 2.Mbps.<br />

The cycle time, that is, the time required for I/O data to be exchanged once with all the connected<br />

nodes, depends on the amount of user data in an INTERBUS system, that is, on the number of nodes<br />

and on the dimension of the SR inside each node. Depending on the configuration, INTERBUS can<br />

achieve cycle times of just a few milliseconds. The cycle time increases linearly with the number of I/O<br />

points, as it depends on the amount of information to be transmitted. For more detailed information,<br />

refer to the chapter performance evaluation.<br />

The architecture of the INTERBUS protocol is based on the open system interconnection (OSI) reference<br />

model according to International Standards Organization (ISO) 7498. As is typical for fieldbus<br />

<strong>systems</strong>, for reasons of efficiency, ISO layers 3–6 are not explicitly used (see Figure 33.5) but are combined<br />

in the lower layer interface (LLI) in layer 7. The protocol architecture of INTERBUS provides both<br />

periodic and asynchronous <strong>communication</strong>s.<br />

Application process<br />

PMS services<br />

PNM7 services<br />

PMS<br />

Application layer (layer 7)<br />

LLI<br />

PNM7<br />

Empty (layer 3–6)<br />

Data link layer (layer 2)<br />

PDL<br />

Physical layer (layer 1)<br />

PHY<br />

Management<br />

PNM1/2<br />

FIGURE 33.5<br />

Protocol architecture of an INTERBUS node.<br />

© <strong>2011</strong> by Taylor and Francis Group, LLC

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