Intel® 64 and IA-32 Architectures Optimization Reference Manual

GENERAL OPTIMIZATION GUIDELINESExample 3-30. Non-forwarding Example of Large Load After Small Storemov [EBP], ‘a’mov [EBP + 1], ‘b’mov [EBP + 2], ‘c’mov [EBP + 3], ‘d’mov EAX, [EBP] ; Blocked; The first 4 small store can be consolidated into; a single DWORD store to prevent this non-forwarding; situation.Example 3-31 illustrates a stalled store-forwarding situation that may appear incompiler generated code. Sometimes a compiler generates code similar to thatshown in Example 3-31 to handle a spilled byte to the stack and convert the byte toan integer value.Example 3-31. A Non-forwarding Situation in Compiler Generated Codemov DWORD PTR [esp+10h], 00000000hmov BYTE PTR [esp+10h], blmov eax, DWORD PTR [esp+10h] ; Stalland eax, 0xff; Converting back to byte valueExample 3-32 offers two alternatives to avoid the non-forwarding situation shown inExample 3-31.Example 3-32. Two Ways to Avoid Non-forwarding Situation in Example 3-31; A. Use MOVZ instruction to avoid large load after small; store, when spills are ignored.movz eax, bl; Replaces the last three instructions; B. Use MOVZ instruction and handle spills to the stackmov DWORD PTR [esp+10h], 00000000hmov BYTE PTR [esp+10h], blmovz eax, BYTE PTR [esp+10h] ; Not blockedWhen moving data that is smaller than 64 bits between memory locations, 64-bit or128-bit SIMD register moves are more efficient (if aligned) and can be used to avoidunaligned loads. Although floating-point registers allow the movement of 64 bits at atime, floating point instructions should not be used for this purpose, as data may beinadvertently modified.3-53