Intel® 64 and IA-32 Architectures Optimization Reference Manual

OPTIMIZING FOR SIMD INTEGER APPLICATIONS5.4.4 Interleaved Pack without SaturationExample 5-7 is similar to Example 5-6 except that the resulting words are not saturated.In addition, in order to protect against overflow, only the low order 16 bits ofeach doubleword are used. Again, Example 5-7 can be extended in SSE2 to accomplishinterleaving eight words without saturation.Example 5-7. Interleaved Pack without Saturation Code; Input:; MM0 signed source value; MM1 signed source value; Output:; MM0 the first and third words contain the; low 16-bits of the doublewords in MM0,; the second and fourth words contain the; low 16-bits of the doublewords in MM1pslld mm1, 16 ; shift the 16 LSB from each of the; doubleword values to the 16 MSB; positionpand mm0, {0,ffff,0,ffff}; mask to zero the 16 MSB; of each doubleword valuepor mm0, mm1 ; merge the two operands5.4.5 Non-Interleaved UnpackUnpack instructions perform an interleave merge of the data elements of the destinationand source operands into the destination register.The following example merges the two operands into destination registers withoutinterleaving. For example, take two adjacent elements of a packed-word data type inSOURCE1 and place this value in the low 32 bits of the results. Then take two adjacentelements of a packed-word data type in SOURCE2 and place this value in thehigh 32 bits of the results. One of the destination registers will have the combinationillustrated in Figure 5-3.5-10