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Intel® 64 and IA-32 Architectures Optimization Reference Manual

Intel® 64 and IA-32 Architectures Optimization Reference Manual

Intel® 64 and IA-32 Architectures Optimization Reference Manual

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INTEL® <strong>64</strong> AND <strong>IA</strong>-<strong>32</strong> PROCESSOR ARCHITECTURESThe front end supplies instructions in program order to the out-of-order core. Itfetches <strong>and</strong> decodes instructions. The decoded instructions are translated into µops.The front end’s primary job is to feed a continuous stream of µops to the executioncore in original program order.The out-of-order core aggressively reorders µops so that µops whose inputs areready (<strong>and</strong> have execution resources available) can execute as soon as possible. Thecore can issue multiple µops per cycle.The retirement section ensures that the results of execution are processed accordingto original program order <strong>and</strong> that the proper architectural states are updated.Figure 2-4 illustrates a diagram of the major functional blocks associated with theIntel NetBurst microarchitecture pipeline. The following subsections provide an overviewfor each.Figure 2-4. The Intel NetBurst Microarchitecture2-21

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