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Intel® 64 and IA-32 Architectures Optimization Reference Manual

Intel® 64 and IA-32 Architectures Optimization Reference Manual

Intel® 64 and IA-32 Architectures Optimization Reference Manual

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MULTICORE AND HYPER-THREADING TECHNOLOGYExample 8-13. Discovering the Affinity Masks for Sibling Logical ProcessorsSharing the Same Cache (Contd.)CacheIDBucket is an array of unique Cache_ID values. Allocate an arrayof NumStartedLPs count of entries in this array for the target cache level.CacheProcessorMask is a corresponding array of the bit mask of logicalprocessors sharing the same target level cache, these are logicalprocessors with the same Cache_ID.The algorithm below assumes there is symmetry across the modularboundary of target cache topology if more than one socket is populatedin an MP system, <strong>and</strong> only the topology of the target cache level is discovered.Topology of other cache level can be determined in a similar manner.// Bucket Cache IDs <strong>and</strong> compute processor mask for the target cache of every package.CacheNum = 1;CacheIDBucket[0] = CacheID[0];ProcessorMask = 1;CacheProcessorMask[0] = ProcessorMask;}If (CacheID[ProcessorNum] == CacheIDBucket[i]) {CacheProcessorMask[i] |= ProcessorMask;Break; //Found in existing bucket,skip to next iteration.}For (ProcessorNum = 1; ProcessorNum < NumStartedLPs; ProcessorNum++) {ProcessorMask

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