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Intel® 64 and IA-32 Architectures Optimization Reference Manual

Intel® 64 and IA-32 Architectures Optimization Reference Manual

Intel® 64 and IA-32 Architectures Optimization Reference Manual

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USING PERFORMANCE MONITORING EVENTSMetricBus AccessesUnderway from theprocessor 2Bus Reads Underwayfrom the processor 2Table B-5. Performance Metrics - Bus (Contd.)DescriptionAccrued sum of thedurations of all bustransactions by thisprocessor.Divide by “BusAccesses from theprocessor” to get busrequest latency.Also beware ofdifferent recipes inmask bits for Pentium4 <strong>and</strong> Intel Xeonprocessors betweenCPUID model fieldvalue of 2 <strong>and</strong> modelvalue less than 2.Accrued sum of thedurations of all read(includes RFOs)transactions by thisprocessor.Divide by “Reads fromthe Processor” to getbus read requestlatency.Also beware ofdifferent recipes inmask bits for Pentium4 <strong>and</strong> Intel Xeonprocessors betweenCPUID model fieldvalue of 2 <strong>and</strong> modelvalue less than 2.Event Name or MetricExpressionIOQ_active_entriesIOQ_active_entriesEvent Mask ValueRequired1a. ReqA0, ALL_READ,ALL_WRITE, OWN,PREFETCH(CPUID model < 2);1b. ReqA0, ALL_READ,ALL_WRITE,MEM_WB, MEM_WT,MEM_WP, MEM_WC,MEM_UC, OWN,PREFETCH (CPUIDmodel >= 2).1a. ReqA0, ALL_READ,OWN, PREFETCH(CPUID model < 2);1b. ReqA0, ALL_READ,MEM_WB, MEM_WT,MEM_WP, MEM_WC,MEM_UC,OWN, PREFETCH(CPUID model >= 2);B-21

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