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Intel® 64 and IA-32 Architectures Optimization Reference Manual

Intel® 64 and IA-32 Architectures Optimization Reference Manual

Intel® 64 and IA-32 Architectures Optimization Reference Manual

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GENERAL OPTIMIZATION GUIDELINESExample 3-1 shows the assembly code with unpredictable branches. The unpredictablebranches can be removed with the use of the SETCC instruction. Example 3-2shows optimized code that has no branches.Example 3-1. Assembly Code with an Unpredictable Branchcmp a, b; Conditionjbe L30 ; Conditional branchmov ebx const1; ebx holds Xjmp L31; Unconditional branchL30:mov ebx, const2L31:Example 3-2. Code <strong>Optimization</strong> to Eliminate Branchesxor ebx, ebx ; Clear ebx (X in the C code)cmp A, Bsetge bl ; When ebx = 0 or 1; OR the complement conditionsub ebx, 1 ; ebx=11...11 or 00...00<strong>and</strong> ebx, CONST3; CONST3 = CONST1-CONST2add ebx, CONST2; ebx=CONST1 or CONST2The optimized code in Example 3-2 sets EBX to zero, then compares A <strong>and</strong> B. If A isgreater than or equal to B, EBX is set to one. Then EBX is decreased <strong>and</strong> AND’d withthe difference of the constant values. This sets EBX to either zero or the difference ofthe values. By adding CONST2 back to EBX, the correct value is written to EBX. WhenCONST2 is equal to zero, the last instruction can be deleted.Another way to remove branches on Pentium II <strong>and</strong> subsequent processors is to usethe CMOV <strong>and</strong> FCMOV instructions. Example 3-3 shows how to change a TEST <strong>and</strong>branch instruction sequence using CMOV to eliminate a branch. If the TEST sets theequal flag, the value in EBX will be moved to EAX. This branch is data-dependent, <strong>and</strong>is representative of an unpredictable branch.3-8

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