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Intel® 64 and IA-32 Architectures Optimization Reference Manual

Intel® 64 and IA-32 Architectures Optimization Reference Manual

Intel® 64 and IA-32 Architectures Optimization Reference Manual

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USING PERFORMANCE MONITORING EVENTSMetricAll WC Underwayfrom the processor 2Bus WritesUnderway from theprocessor 2Table B-5. Performance Metrics - Bus (Contd.)DescriptionAccrued sum of thedurations of all WCtransactions by thisprocessor.Divide by “All WC fromthe processor” to getWC request latency.Also beware ofdifferent recipes inmask bits for Pentium4 <strong>and</strong> Intel Xeonprocessors betweenCPUID model fieldvalue of 2 <strong>and</strong> modelvalue less than 2.Accrued sum of thedurations of all writetransactions by thisprocessorDivide by “Writes fromthe Processor” to getbus write requestlatency.Also beware ofdifferent recipes inmask bits for Pentium4 <strong>and</strong> Intel Xeonprocessors betweenCPUID model fieldvalue of 2 <strong>and</strong> modelvalue less than 2.Event Name or MetricExpressionIOQ_active_entriesIOQ_active_entriesEvent Mask ValueRequired1a. ReqA0, MEM_WC,OWN (CPUID model = 2)1a. 1a. ReqA0,ALL_WRITE, OWN(CPUID model < 2);1b. ReqA0, ALL_WRITE,MEM_WB, MEM_WT,MEM_WP, MEM_WC,MEM_UC, OWN(CPUID model >= 2).B-23

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