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Intel® 64 and IA-32 Architectures Optimization Reference Manual

Intel® 64 and IA-32 Architectures Optimization Reference Manual

Intel® 64 and IA-32 Architectures Optimization Reference Manual

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POWER OPTIMIZATION FOR MOBILE USAGES• C3 — This level provides greater power savings than C1 or C2. In C3, theprocessor stops clock generating <strong>and</strong> snooping activity. It also allows systemmemory to enter self-refresh mode.The basic technique to implement OS power management policy to reduce staticpower consumption is by evaluating processor idle durations <strong>and</strong> initiating transitionsto higher-numbered C-state types. This is similar to the technique of reducing activepower consumption by evaluating processor utilization <strong>and</strong> initiating P-state transitions.The OS looks at history within a time window <strong>and</strong> then sets a target C-statetype for the next time window, as illustrated in Figure 10-3:Figure 10-3. Application of C-states to Idle TimeConsider that a processor is in lowest frequency (LFM- low frequency mode) <strong>and</strong> utilizationis low. During the first time slice window (Figure 10-3 shows an example thatuses 100 ms time slice for C-state decisions), processor utilization is low <strong>and</strong> the OSdecides to go to C2 for the next time slice. After the second time slice, processor utilizationis still low <strong>and</strong> the OS decides to go into C3.10.3.1 Processor-Specific C4 <strong>and</strong> Deep C4 StatesThe Pentium M, Intel Core Solo, Intel Core Duo processors, <strong>and</strong> processors based onIntel Core microarchitecture 4 provide additional processor-specific C-states (<strong>and</strong>associated sub C-states) that can be mapped to ACPI C3 state type. The processorspecificC states <strong>and</strong> sub C-states are accessible using MWAIT extensions <strong>and</strong> can bediscovered using CPUID. One of the processor-specific state to reduce static powerconsumption is referred to as C4 state. C4 provides power savings in the followingmanner:• The voltage of the processor is reduced to the lowest possible level that stillallows the L2 cache to maintain its state.4. Pentium M processor can be detected by CPUID signature with family 6, model 9 or 13; Intel CoreSolo <strong>and</strong> Intel Core Duo processor has CPUID signature with family 6, model 14; processors basedon Intel Core microarchitecture has CPUID signature with family 6, model 15.10-4

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