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Intel® 64 and IA-32 Architectures Optimization Reference Manual

Intel® 64 and IA-32 Architectures Optimization Reference Manual

Intel® 64 and IA-32 Architectures Optimization Reference Manual

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INSTRUCTION LATENCY AND THROUGHPUTTable C-5a. Streaming SIMD Extension Single-precisionFloating-point Instructions (Contd.)Instruction Latency 1 ThroughputDisplayFamily_DisplayModel06_0FH06_0EH06_0DH06_09H06_0FH06_0EH06_0DHUCOMISS xmm, xmm 1 1 1 1UNPCKHPS xmm, xmm 4 3 3 2UNPCKLPS xmm, xmm 4 3 3 2XORPS xmm, xmm 1 2 0.33 2FXRSTORFXSAVESee Appendix C.3.2, “Table Footnotes”06_09HTable C-6. Streaming SIMD Extension <strong>64</strong>-bit Integer InstructionsInstruction Latency 1 Throughput Execution UnitCPUID 0F_03H 0F_02H 0F_03H 0F_02H 0F_02HPAVGB/PAVGW mm, mm 2 2 1 1 MMX_ALUPEXTRW r<strong>32</strong>, mm, imm8 7 7 2 2 MMX_SHFT,FP_MISCPINSRW mm, r<strong>32</strong>, imm8 4 4 1 1 MMX_SHFT,MMX_MISCPMAX mm, mm 2 2 1 1 MMX_ALUPMIN mm, mm 2 2 1 1 MMX_ALUPMOVMSKB 3 r<strong>32</strong>, mm 7 7 2 2 FP_MISCPMULHUW 3 mm, mm 9 8 1 1 FP_MULPSADBW mm, mm 4 4 1 1 MMX_ALUPSHUFW mm, mm, imm8 2 2 1 1 MMX_SHFTSee Appendix C.3.2, “Table Footnotes”C-17

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