Intel® 64 and IA-32 Architectures Optimization Reference Manual

INTEL® 64 AND IA-32 PROCESSOR ARCHITECTURES2.5.1.1 Replicated ResourcesThe architectural state is replicated for each logical processor. The architecture stateconsists of registers that are used by the operating system and application code tocontrol program behavior and store data for computations. This state includes theeight general-purpose registers, the control registers, machine state registers,debug registers, and others. There are a few exceptions, most notably the memorytype range registers (MTRRs) and the performance monitoring resources. For acomplete list of the architecture state and exceptions, see the Intel® 64 and IA-32Architectures Software Developer’s Manual, Volumes 3A & 3B.Other resources such as instruction pointers and register renaming tables were replicatedto simultaneously track execution and state changes of the two logical processors.The return stack predictor is replicated to improve branch prediction of returninstructions.In addition, a few buffers (for example, the 2-entry instruction streaming buffers)were replicated to reduce complexity.2.5.1.2 Partitioned ResourcesSeveral buffers are shared by limiting the use of each logical processor to half theentries. These are referred to as partitioned resources. Reasons for this partitioninginclude:• Operational fairness• Permitting the ability to allow operations from one logical processor to bypassoperations of the other logical processor that may have stalledFor example: a cache miss, a branch misprediction, or instruction dependencies mayprevent a logical processor from making forward progress for some number ofcycles. The partitioning prevents the stalled logical processor from blocking forwardprogress.In general, the buffers for staging instructions between major pipe stages are partitioned.These buffers include µop queues after the execution trace cache, the queuesafter the register rename stage, the reorder buffer which stages instructions forretirement, and the load and store buffers.In the case of load and store buffers, partitioning also provided an easier implementationto maintain memory ordering for each logical processor and detect memoryordering violations.2.5.1.3 Shared ResourcesMost resources in a physical processor are fully shared to improve the dynamic utilizationof the resource, including caches and all the execution units. Some sharedresources which are linearly addressed, like the DTLB, include a logical processor IDbit to distinguish whether the entry belongs to one logical processor or the other.2-39