Intel® 64 and IA-32 Architectures Optimization Reference Manual

USING PERFORMANCE MONITORING EVENTS1st Level DataCacheUnified 2nd LevelCache3rd Level CacheBSQFSB_ IOQSystem MemoryChip SetFSB_ IOQ3rd Level CacheBSQ1st Level DataCacheUnified 2nd LevelCacheFigure B-1. Relationships Between Cache Hierarchy, IOQ, BSQ and FSBCore references are nominally 64 bytes, the size of a 1st level cache line. Smallersizes are called partials (uncacheable and write combining reads, uncacheable,write-through and write-protect writes, and all I/O). Writeback locks, streamingstores and write combining stores may be full line or partials. Partials are not relevantfor cache references, since they are associated with non-cached data. Likewise,writebacks (due to the eviction of dirty data) and RFOs (reads for ownership due toprogram stores) are not relevant for non-cached data.The granularity at which the core references are counted by different bus andmemory metrics listed in Table B-1 varies, depending on the underlying perfor-B-31