Intel® 64 and IA-32 Architectures Optimization Reference Manual

USING PERFORMANCE MONITORING EVENTSMetricAll UC from theProcessorBus Accesses fromAll AgentsTable B-5. Performance Metrics - Bus (Contd.)DescriptionNumber of UC(Uncacheable) memorytransactions on thebus that originatedfrom this processorBeware of granularityissues (for example: astore of dqword to UCmemory requires twoentries in IOQallocation). AlsoBeware of differentrecipes in mask bits forPentium 4 and IntelXeon processorsbetween CPUID modelfield value of 2 andmodel value lessthan 2.Number of all bustransactions that wereallocated in the IOQueue by all agentsBeware of granularityissues with this event.Also beware ofdifferent recipes inmask bits for Pentium4 and Intel Xeonprocessors betweenCPUID model fieldvalue of 2 and modelvalue less than 2.Event Name or MetricExpressionIOQ_allocationIOQ_allocationEvent Mask ValueRequired1a. ReqA0, MEM_UC,OWN (CPUID model = 2)2: Enable edgefiltering 1 in theCCCR.1a. ReqA0, ALL_READ,ALL_WRITE, OWN,OTHER, PREFETCH(CPUID model < 2);1b. ReqA0, ALL_READ,ALL_WRITE,MEM_WB, MEM_WT,MEM_WP, MEM_WC,MEM_UC, OWN,OTHER, PREFETCH(CPUID model >= 2).2: Enable edgefiltering 1 in theCCCR.B-20