Intel® 64 and IA-32 Architectures Optimization Reference Manual

OPTIMIZING FOR SIMD INTEGER APPLICATIONS• Runtime initialization — Use _MM_EMPTY() during runtime initialization of__M64 and X87 FP data types. This ensures resetting the register between datatype transitions. See Example 5-1 for coding usage.Example 5-1. Resetting Register Between __m64 and FP Data Types CodeIncorrect Usage Correct Usage__m64 x = _m_paddd(y, z);float f = init();__m64 x = _m_paddd(y, z);float f = (_mm_empty(), init());You must be aware that your code generates an MMX instruction, which uses MMXregisters with the Intel C++ Compiler, in the following situations:• when using a 64-bit SIMD integer intrinsic from MMX technology,SSE/SSE2/SSSE3• when using a 64-bit SIMD integer instruction from MMX technology,SSE/SSE2/SSSE3 through inline assembly• when referencing the __M64 data type variableAdditional information on the x87 floating-point programming model can be found inthe Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 1. Formore on EMMS, visit http://developer.intel.com.5.3 DATA ALIGNMENTMake sure that 64-bit SIMD integer data is 8-byte aligned and that 128-bit SIMDinteger data is 16-byte aligned. Referencing unaligned 64-bit SIMD integer data canincur a performance penalty due to accesses that span 2 cache lines. Referencingunaligned 128-bit SIMD integer data results in an exception unless the MOVDQU(move double-quadword unaligned) instruction is used. Using the MOVDQU instructionon unaligned data can result in lower performance than using 16-byte alignedreferences. Refer to Section 4.4, “Stack and Data Alignment,” for more information.Loading 16 bytes of SIMD data efficiently requires data alignment on 16-byte boundaries.SSSE3 provides the PALIGNR instruction. It reduces overhead in situations thatrequires software to processing data elements from non-aligned address. ThePALIGNR instruction is most valuable when loading or storing unaligned data with theaddress shifts by a few bytes. You can replace a set of unaligned loads with alignedloads followed by using PALIGNR instructions and simple register to register copies.Using PALIGNRs to replace unaligned loads improves performance by eliminatingcache line splits and other penalties. In routines like MEMCPY( ), PALIGNR can boost5-4