IntelÂ® 64 and IA-32 Architectures Optimization Reference Manual

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CODING FOR SIMD ARCHITECTURESSoftware must check for support of MONITOR and MWAIT before attempting to useMONITOR and MWAIT.Detecting the availability of MONITOR and MWAIT can be doneusing a code sequence similar to Example 4-4. The availability of MONITOR andMWAIT is indicated by bit 3 of the returned value in ECX.4.1.5 Checking for Supplemental Streaming SIMD Extensions 3SupportChecking for support of SSSE3 is similar to checking for SSE support. The OS requirementsfor SSSE3 Support are the same as the requirements for SSE.To check whether your system supports SSSE3, follow these steps:1. Check that your processor has the CPUID instruction.2. Check the feature bits of CPUID for SSSE3 technology existence.Example 4-5 shows how to find the SSSE3 feature bit in the CPUID feature flags.Example 4-5. Identification of SSSE3 with cpuid…Identify existence of CPUID instruction…; Identify signature is genuine intelmov eax, 1; Request for feature flagscpuid; 0FH, 0A2H CPUID instructiontest ECX, 000000200h ; ECX bit 9jnz Found4.2 CONSIDERATIONS FOR CODE CONVERSION TO SIMDPROGRAMMINGThe VTune Performance Enhancement Environment CD provides tools to aid in theevaluation and tuning. Before implementing them, you need answers to the followingquestions:1. Will the current code benefit by using MMX technology, Streaming SIMDExtensions, Streaming SIMD Extensions 2, Streaming SIMD Extensions 3, orSupplemental Streaming SIMD Extensions 3?2. Is this code integer or floating-point?3. What integer word size or floating-point precision is needed?4. What coding techniques should I use?5. What guidelines do I need to follow?6. How should I arrange and align the datatypes?Figure 4-1 provides a flowchart for the process of converting code to MMX technology,SSE, SSE2, SSE3, or SSSE3.4-4
CODING FOR SIMD ARCHITECTURESIdentify Hot Spots in CodeNoCode benefitsfrom SIMDYesFloating PointInteger orfloating-point?IntegerWhy FP?PerformanceIf possible, re-arrange datafor SIMD efficiencyRange orPrecisionAlign data structuresCan convertto Integer?YesChange to useSIMD IntegerConvert to code to useSIMD TechnologiesNoFollow general codingguidelines and SIMDcoding guidelinesCan convert toSingle-precision?YesChange to useSingle PrecisionUse memory optimizationsand prefetch if appropriateNoSchedule instructions tooptimize performanceSTOPOM15156Figure 4-1. Converting to Streaming SIMD Extensions Chart4-5
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NIntel® 64 and IA-32 Architectures
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CONTENTS2.3.1 Front End. . . . . .
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CONTENTS3.7 PREFETCHING . . . . . .
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CONTENTS5.7.2.1 Increasing Memory B
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CONTENTS9.5.3 Streaming Store Instr
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CONTENTSB.7.4.3B.7.4.4B.7.4.5B.7.4.
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CONTENTSExample 4-1. Identification
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CONTENTSExample 9-8. Using HW Prefe
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CONTENTSFigure 9-7. Cache Blocking
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CHAPTER 1INTRODUCTIONThe Intel® 64
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INTRODUCTION• Chapter 10: Power O
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CHAPTER 2INTEL ® 64 AND IA-32 PROC
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INTEL® 64 AND IA-32 PROCESSOR ARCH
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CHAPTER 3GENERAL OPTIMIZATION GUIDE
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GENERAL OPTIMIZATION GUIDELINESThe
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GENERAL OPTIMIZATION GUIDELINEScomp
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GENERAL OPTIMIZATION GUIDELINES•
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GENERAL OPTIMIZATION GUIDELINESExam
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GENERAL OPTIMIZATION GUIDELINESthro
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GENERAL OPTIMIZATION GUIDELINESAsse
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GENERAL OPTIMIZATION GUIDELINESIn t
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GENERAL OPTIMIZATION GUIDELINESExam
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GENERAL OPTIMIZATION GUIDELINESBeca
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GENERAL OPTIMIZATION GUIDELINESInst
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GENERAL OPTIMIZATION GUIDELINESXOR
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GENERAL OPTIMIZATION GUIDELINESUse
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GENERAL OPTIMIZATION GUIDELINES•
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GENERAL OPTIMIZATION GUIDELINESMOVS
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GENERAL OPTIMIZATION GUIDELINESAsse
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OPTIMIZING FOR SIMD INTEGER APPLICA
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OPTIMIZING FOR SIMD FLOATING-POINT
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MULTICORE AND HYPER-THREADING TECHN
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OPTIMIZING CACHE USAGE• Take adva
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OPTIMIZING CACHE USAGEHardware pref
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OPTIMIZING CACHE USAGEThe non-tempo
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OPTIMIZING CACHE USAGE9.5.1.3 Memor
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OPTIMIZING CACHE USAGENOTEFailure t
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OPTIMIZING CACHE USAGE9.5.5 CLFLUSH
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OPTIMIZING CACHE USAGE• The hardw
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OPTIMIZING CACHE USAGETimeExecution
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OPTIMIZING CACHE USAGEschedule pref
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OPTIMIZING CACHE USAGEtime is large
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OPTIMIZING CACHE USAGEresource stal
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OPTIMIZING CACHE USAGEPrefetchntaDa
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OPTIMIZING CACHE USAGEExample 9-7.
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OPTIMIZING CACHE USAGEA characteris
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OPTIMIZING CACHE USAGE9.7 MEMORY OP
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OPTIMIZING CACHE USAGE9.7.2.3 Concl
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OPTIMIZING CACHE USAGEis not reside
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OPTIMIZING CACHE USAGEExample 9-11.
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OPTIMIZING CACHE USAGETable 9-3. De
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OPTIMIZING CACHE USAGE• If a proc
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64-BIT MODE CODING GUIDELINESAssemb
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64-BIT MODE CODING GUIDELINESinstru
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64-BIT MODE CODING GUIDELINES9-6
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POWER OPTIMIZATION FOR MOBILE USAGE
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APPLICATION PERFORMANCE TOOLSThe /f
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APPLICATION PERFORMANCE TOOLSTable
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APPLICATION PERFORMANCE TOOLSA.1.6.
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APPLICATION PERFORMANCE TOOLSExampl
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APPLICATION PERFORMANCE TOOLSExampl
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APPLICATION PERFORMANCE TOOLSprogra
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APPLICATION PERFORMANCE TOOLSThe Li
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APPLICATION PERFORMANCE TOOLSA.5 IN
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USING PERFORMANCE MONITORING EVENTS
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INSTRUCTION LATENCY AND THROUGHPUTW
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INSTRUCTION LATENCY AND THROUGHPUTT
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INSTRUCTION LATENCY AND THROUGHPUT
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INSTRUCTION LATENCY AND THROUGHPUTC
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STACK ALIGNMENTThe solution to this
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STACK ALIGNMENTExample D-1. Aligned
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STACK ALIGNMENTExample D-2. Aligned
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STACK ALIGNMENTD-8
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SUMMARY OF RULES AND SUGGESTIONSret
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SUMMARY OF RULES AND SUGGESTIONSfou
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SUMMARY OF RULES AND SUGGESTIONSvar
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SUMMARY OF RULES AND SUGGESTIONSto
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SUMMARY OF RULES AND SUGGESTIONSCor
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SUMMARY OF RULES AND SUGGESTIONSE-1
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INDEXsummary of rules, E-1tuning hi
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INDEXevent ratios, B-50execution co
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INDEXprefetching, 8-5SFENCE instruc
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INDEXPMAXSW, 5-28PMAXUB, 5-28PMINSW
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INDEXIndex-10
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Intel Corp.999 CANADA PLACE,Suite 4
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IntelÂ® 64 and IA-32 Architectures Optimization Reference Manual

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