Intel® 64 and IA-32 Architectures Optimization Reference Manual

OPTIMIZING CACHE USAGE9.6.1 Software-Controlled PrefetchThe software-controlled prefetch is enabled using the four PREFETCH instructionsintroduced with Streaming SIMD Extensions instructions. These instructions arehints to bring a cache line of data in to various levels and modes in the cache hierarchy.The software-controlled prefetch is not intended for prefetching code. Using itcan incur significant penalties on a multiprocessor system when code is shared.Software prefetching has the following characteristics:• Can handle irregular access patterns which do not trigger the hardwareprefetcher.• Can use less bus bandwidth than hardware prefetching; see below.• Software prefetches must be added to new code, and do not benefit existingapplications.9.6.2 Hardware PrefetchAutomatic hardware prefetch can bring cache lines into the unified last-level cachebased on prior data misses. It will attempt to prefetch two cache lines ahead of theprefetch stream. Characteristics of the hardware prefetcher are:• It requires some regularity in the data access patterns.— If a data access pattern has constant stride, hardware prefetching is effectiveif the access stride is less than half of the trigger distance of hardwareprefetcher (see Table 2-6).— If the access stride is not constant, the automatic hardware prefetcher canmask memory latency if the strides of two successive cache misses are lessthan the trigger threshold distance (small-stride memory traffic).— The automatic hardware prefetcher is most effective if the strides of twosuccessive cache misses remain less than the trigger threshold distance andclose to 64 bytes.• There is a start-up penalty before the prefetcher triggers and there may befetches an array finishes. For short arrays, overhead can reduce effectiveness.— The hardware prefetcher requires a couple misses before it starts operating.— Hardware prefetching generates a request for data beyond the end of anarray, which is not be utilized. This behavior wastes bus bandwidth. Inaddition this behavior results in a start-up penalty when fetching thebeginning of the next array. Software prefetching may recognize and handlethese cases.• It will not prefetch across a 4-KByte page boundary. A program has to initiatedemand loads for the new page before the hardware prefetcher startsprefetching from the new page.9-13